Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-10-30
2007-10-30
Ngo, Chuong D. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
10437287
ABSTRACT:
Electronic device (10) to calculate linear functions and to calculate and generate non-linear functions, intended to process signals. The electronic device (10) is provided with a calculator unit (11) to calculate linear functions, a device (12) to generate arbitrary functions, including nonlinear functions, and a selector device (13) to selectively put the electronic device (10) in a first mode to calculate linear functions and a second mode to generate non-linear functions.
REFERENCES:
patent: 4511882 (1985-04-01), Keyes, IV et al.
patent: 5963460 (1999-10-01), Rarick
patent: 5996066 (1999-11-01), Yung
patent: 2003/0005013 (2003-01-01), Steele
Anderson, D. et al., “A Field Programmable Analog Array and its Application”, Paper No. XP-000751540, IEEE 1997 Custom Integrated Circuits Conference, vol. conf. 19, pp. 555-558 (May 5, 1997).
Patel, Minesh I. et al., “PANTHER: A Parallel Neuro Systolic Architecture for Real-Time Processing”, Paper No. XP-002224310, IEEE International Conference on Neural Works, vol. 2, pp. 1006-1011 (1996).
Chan, C-K et al., “Configurable Nonlinear Filter Generator”, Paper No. XP-000773767, Electronics Letters, vol. 34, No. 4, pp. 349-350 (Feb. 19, 1998).
Tanaka K et al., “An on-chip parallel processor for neural networks” Progress in Neural Information Processing. Proceedings of the International Conference on Neural Information Processing, Proceedings of 1996 International Conference on Neural Information Processing. ICONIP '96, Hong Kong; Sep. 24-27, 1996; pp. 1243-1246; vol. 2.
Kondo Y et al., “A 1.2GFLOPS neural network chip exhibiting fast convergence” Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41stISSCC., 1994 IEEE International San Francisco, CA, USA Feb. 16-18, 1994; New York, NY, USA, IEEE; pp. 218-219.
Sartori Alvise
Tecchiolli Giampietro
Neuricam SpA
Ngo Chuong D.
Stevens Davis Miller & Mosher LLP
LandOfFree
Electronic device to calculate and generate linear and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic device to calculate and generate linear and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic device to calculate and generate linear and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3889290