Electronic device package having solder leads and methods of ass

Details Electronic device package having solder leads and methods of ass Electronic device package having solder leads and methods of ass

1978-10-27

1980-07-22

Reynolds, B. A.

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

29591, 339 17CF, 357 70, H05K 106

Patent

active

042141206

ABSTRACT:
An electronic circuit package (11) includes a substrate (14) with leads (21) extending from at least one edge thereof. The leads (21) have a split end (26) formed by two slits (31, 51). The slits divide the end into a lead stub (29) and a flag end (28). The flag end (28) is formed up in a step of approximately the thickness of the substrate (14). The forming of the flag end (28) foreshortens a flag support (32) to locate a flag (34) in substantial superposition to the lead stub (29). Both the lead stub (29) and the flag (34) are solder bonded to respective bond pads (18) on the upper and lower major surfaces of the substrate (14).

REFERENCES:
patent: 1232584 (1917-07-01), McMunn
patent: 2655705 (1953-10-01), Hatfield
patent: 3650232 (1972-03-01), Heinlen
patent: 3689684 (1972-09-01), Cox et al.
patent: 3691629 (1972-09-01), Schierz
patent: 3735017 (1973-05-01), Manning
patent: 3736367 (1973-05-01), Heinlein et al.
patent: 3824679 (1974-07-01), Mosch et al.
patent: 3839782 (1974-10-01), Lincoln
patent: 3868725 (1975-02-01), DeGraff
patent: 4032706 (1977-06-01), Paletto
patent: 4054238 (1977-10-01), Lloyd et al.
patent: 4059810 (1977-11-01), Paletto
Solok Terminations, Berg Electronics Bulletin 124, Jun. 1976.
Photograph of commercially available lead frame submitted by applicants.

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