Electronic device package, and method

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Reexamination Certificate

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Details

C257S778000, C257S734000, C174S260000, C174S255000

Reexamination Certificate

active

06350954

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to electronic device packages, and more particularly, but not exclusively, to electronic device packages using metal leadframes.
BACKGROUND OF THE INVENTION
In the electronics industry, discrete transistors, integrated circuits, as well as passive elements have to be arranged on a printed circuit board. Miniaturization is thereby of vital importance for many applications (e.g., mechatronics)
The need for an electronic device package assembly, is illustrated by the example of automotive applications where power and logic devices are used in conjunction with each other, to perform a single function. For example, an electric motor for operating an automatic sunroof or a window of a vehicle is typically actuated by a switch formed by power transistors. In order to reduce power consumption, the switch is ideally placed as close as possible to the electric motor, thus keeping the length of high current paths to a minimum and hence reducing unnecessary power losses. Typically the driver of a vehicle may prefer to operate a separate input key on the dashboard of the vehicle, which then sends a (low-power) signal to the switch, in order to actuate it. Therefore a certain amount of logic circuitry is required, preferably at the switch, in order to control the actuation and other auxiliary functions, such as fail-safe features. Therefore there is a need to incorporate logic integrated circuits and power transistors into a single package, which is ideally adapted to be mounted on or in close proximity to the electric motor.
A problem with existing combined logic/power packages is that the high power requirements of the switch do not easily facilitate integration with low power logic integrated circuits. The high currents involved preclude the use of conventional wire bond techniques, and the thermal management of heat dissipation presents further problems.
Various techniques are known for mounting and arranging semiconductor devices in packages. The British patent application GB 2 334 143 A (“Reference 1”) describes an electronic device package having a semiconductor device sandwiched between a metal leadframe and a substrate. Electrical connections can be provided at both faces of the device. Further useful references are U.S. Pat. 5,936,305 to Akram et al. (“Reference 2”); and U.S. Pat. 5,404,273 to Akagawa (“Reference 3”).
The present invention seeks to provide an improved electronic device package which mitigates or avoids disadvantages and limitations of the prior art.


REFERENCES:
patent: 3908185 (1975-09-01), Martin
patent: 4866571 (1989-09-01), Butt
patent: 5057376 (1991-10-01), Sunhara et al.
patent: 5404273 (1995-04-01), Akagawa
patent: 5689091 (1997-11-01), Hamzehdoost et al.
patent: 5801446 (1998-09-01), DiStefano et al.
patent: 5847936 (1998-12-01), Forehand et al.
patent: 5936305 (1999-08-01), Akram
patent: 6011692 (2000-01-01), Bergstedt et al.
patent: 2334143 (1999-08-01), None
patent: 59165439 (1984-09-01), None
patent: 6341052 (1988-02-01), None
WSI Wafer Scale Integration; Slides from the lecture “Aufbau und Verbindungstechnik” (construction and connecting technology) by Prof. Dr.-Ing. Hösel; Hochschule Mittweida; Mittweida, Germany; 1998; and disclaimer.

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