Electronic device including image forming apparatus

Pulse or digital communications – Receivers – Angle modulation

Reexamination Certificate

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Details

C714S025000

Reexamination Certificate

active

10688669

ABSTRACT:
When a plurality of sub-processors are daisy chained in a loop, for example, to a main processor by a one-way bus, a command packet from the main processor addressed to itself is transmitted to the one-way bus which form a return path back to the main processor so as to easily specify a fault portion. If the command packet is returned to the main processor within a predetermined time, it is determined that no fault exists within the electronic device. When a fault exists, a test signal is transmitted to sub-processors via a dedicated signal line, separate from the one-way bus, to trigger a test packet that will be routed through the one way bus. The faulty portion in the electronic device is specified based on whether the test packet transmitted via the one-way bus in accordance with the test packet from each sub-processor is received within a predetermined time.

REFERENCES:
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4817091 (1989-03-01), Katzman et al.
patent: 5689689 (1997-11-01), Meyers et al.
patent: 5737317 (1998-04-01), Takayama
patent: 6275491 (2001-08-01), Prasad et al.
patent: 2-153655 (1990-06-01), None
patent: 4-100446 (1992-04-01), None
patent: 2002-230536 (2002-08-01), None

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