Electronic device including a nonvolatile memory array and...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S195000

Reexamination Certificate

active

07668018

ABSTRACT:
An electronic device can include a first memory cell and a second memory cell. The first memory cell can include a first source, and a second memory cell can include a second source. The first memory cell and the second memory cell can lie within a same sector of a memory array. In one embodiment, erasing the electronic device can include erasing the first memory cell while inhibiting the erase of the second memory cell. A third memory cell can have a third source and lie within another sector. In another embodiment, inhibiting the erase of the first memory cell can include placing the first source and the third source at a same potential. In a particular embodiment, the first source can be electrically insulated from the second source.

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PCT Search Report and Written Opinion from coordinating PCT Application No. PCT/U52008/057637 mailed Jul. 23, 2008.

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