Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate
2001-09-06
2004-03-09
Vigushin, John B. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
C257S529000, C257S665000, C257S686000, C257S723000, C361S778000, C361S803000, C438S128000, C438S130000, C438S132000
Reexamination Certificate
active
06703651
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to an electronic device having stacked modules and to a method for producing it. Each of the modules has a chip mounted on a stack intermediate plane formed by a lead frame.
In order to ensure access to the individual chips, each stack intermediate plane has a chip select circuit that can be set. With the chip select circuit, which requires a different layout for each stack intermediate plane, each individual chip of the stacked modules of the electronic device can be accessed by addressing. Such stacked devices have the disadvantage that a dedicated layout has to be configured and produced for each stack intermediate plane. As a result, not only is the risk of mixing up the stack intermediate planes during the assembly or stacking of the modules to form an electronic device correspondingly increased, but the considerable complexity for different constructions of the different lead structures on the stack intermediate planes also requires an increased expenditure during the production of an electronic device having stacked modules.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an electronic device having stacked modules and a method for producing it that overcomes the above-mentioned disadvantages of the prior art devices of this general type, in which the complexity of the configuration of the stack intermediate planes is considerably reduced and the addressing of the individual modules can be ensured in a simple manner.
With the foregoing and other objects in view there is provided, in accordance with the invention, an electronic device. The electronic device contains stacked modules having stack intermediate planes and chips mounted on the stack intermediate planes. The stack intermediate planes of the stacked modules each have an identical layout. Contact areas are disposed on the chips. Chip select circuits are also disposed on the chips and are able to be set irreversibly through the contact areas. The chip select circuits enable an irreversible assignment of the contact areas to the stack intermediate planes.
According to the invention, the object is achieved by an electronic device having stacked modules. Each of the modules has the chip mounted on the stack intermediate plane, and the stack intermediate planes of a stack have an identical layout. The chip select circuits which can be set irreversibly via contact areas are disposed on the chips, which chip select circuits enable an irreversible assignment of the contact areas to the stack intermediate planes.
This solution has the advantage that the chip select circuit can be minimized and takes up a significantly smaller space requirement than the chip select circuit that is disposed on a stack intermediate plane.
A further advantage is the identical embodiment of all the stack intermediate planes, which is beneficial for mass production, on the one hand, and reduces the costs for the stack intermediate planes, on the other hand.
In one embodiment, the chip select circuit—disposed on the chip—of the present invention has a number of interrupter circuits. The number of interrupter circuits corresponds at least to the number of stack intermediate planes. This has the advantage that the chip addressing can already be performed irreversibly at the chip level by tripping the interrupter circuits, with the result that different addressing circuits on the stack intermediate planes can be obviated. Furthermore, the chip select circuit on the chip has the advantage that the addressing does not have to be performed from the outset, rather the chip addressing or the chip selection can be performed at a suitable point in the production method for the electronic device. In this case, the suitable point depends on the interrupter circuit technology and the most cost-effective point in time for irreversible addressing or irreversible assignment of the contact areas to the stack intermediate planes of the stacked modules of an electronic device.
In a preferred embodiment of the invention, each interrupter circuit is provided with an input line, which is connected to an input contact area, and with an output line, which is connected to an output contact area. Each of the interrupter circuits can be tripped individually via the input contact line or the output contact line, with the result that only one interrupter circuit—determining the stack intermediate plane—on an addressed chip in the chip select circuit is not tripped.
In a further embodiment of the invention, the interrupter circuits have a common output contact area and separate input contact areas. Such a configuration and interconnection of the interrupter circuits reduces the area outlay for the chip select circuit on the chip and simultaneously ensures that each individual interrupter circuit can be driven.
A further embodiment of the invention provides for the input contact areas of the interrupter circuits to be connected via bonded wires to input pads on the stack intermediate planes. This embodiment has the advantage that the tripping of the interrupter circuits does not have to be tripped directly on the chip via the input contact areas, rather, for this purpose, it is possible to use input pads on the identical stack intermediate planes, to which access is facilitated by virtue of the larger input pads relative to the input contact areas.
In a further embodiment of the invention, the input contact areas on the stack intermediate planes are connected to input contact pins which connect the stacked modules. The input contact pins are consequently provided on the stacked modules after the modules have been stacked one above the other, and thus reduce the multiplicity of contact areas and contact pads to a minimum number of input contact pins via which a defined access to the individual modules in the stack then becomes possible. Consequently, the input contact pins are also at the same time the addressing contacts via which access becomes possible to the different stack intermediate planes and chips of the stacked modules from an external circuit for example on a printed circuit board or a flexible lead bus.
In a further embodiment of the invention, the common output contact area of the chip select circuit is in each case connected via a bonded wire to a common output pad on the stack intermediate plane. Since, in this embodiment of the invention, all the interrupter circuits of a chip have only one output contact area, it is therefore necessary also to provide only one output pad on each stack intermediate plane. The outlay for the stack intermediate planes is reduced from individually adapted different addressing circuits on each a stack intermediate plane to now uniform input pads and a common output pad on each stack intermediate plane.
In a further preferred embodiment of the invention, the input pads of the stack intermediate planes are led via through contacts to input contact pins on the base area of the electronic device with the stacked modules. This embodiment has the advantage that the entire base area of the electronic device can be provided with contact pins, thereby enabling a high number of addressing pins and also other signal and power connection pins for an electronic device having the stacked modules.
In a further embodiment of the invention, the input pads of the stack intermediate planes are disposed in the edge region of each stack intermediate plane and are connected via input contact pins on the side areas of the electronic device. For this purpose, the edge region of a lead frame on which the stack intermediate plane is situated is metallized at the locations that are intended to be connected to the input contact pins.
A method for producing an electronic device having stacked modules with irreversible definition and assignment of input contact pins as address contacts has the following method steps. A chip select circuit having a number of interrupter circuits is disposed on the chip. The chip select circuit has separate input contact a
Wennemuth Ingo
Wörz Andreas
LandOfFree
Electronic device having stacked modules and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic device having stacked modules and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic device having stacked modules and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3217687