Electronic device attachment methods and apparatus for...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S762000, C361S764000, C361S772000, C361S807000, C361S813000, C257S666000, C438S117000, C438S120000

Reexamination Certificate

active

06424541

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to methods and apparatus for attaching electronic devices to a substrate to form an assembly. More particularly, the present invention relates to techniques for coating a lead of a device including a leaded package to reduce impedance variation along the length of the lead.
BACKGROUND OF THE INVENTION
Microelectronic devices such as semiconductor devices are often packaged to, among other things, protect the device from mechanical damage, chemical attack, light, extreme temperature cycles, and other environmental effects. The packaging also provides mechanical support for the device and facilitates handling of the device for subsequent attachment to a substrate such as a printed circuit board. If desired, the package may also provide heat dissipation for the device. Although microelectronic packages may include a variety of forms to perform various functions, in general, the package includes a support to receive the device and encapsulating material to surround and protect the device from the surrounding environment.
The support often includes a leadframe that is configured to receive the microelectronic device and facilitate electrical coupling of the device to the substrate. Using a leadframe as a support may be advantageous because the leadframe is relatively inexpensive, is relatively reliable, and techniques for attaching devices to the leadframe and the leadframe to the substrate are relatively well understood. However, as discussed in more detail below, use of leadframes to attach devices to a substrate may be problematic in some respects. In particular, the impedance along a portion conductive path between the microelectronic device and the substrate (e.g., along a portion of the lead of the leadframe) may be relatively high due in part to the environment surrounding the lead and the length of the lead, which is often a few millimeters. In addition, as discussed below, the impedance may vary over the length of the lead, causing additional problems.
The leadframe is generally formed of conductive material (e.g., a thin sheet of metal such as copper) and includes a pad or paddle portion configured to receive various electronic components and leads that are configured to be mechanically and/or electrically coupled to the substrate. The pad and lead regions of the leadframe are commonly formed by stamping or etching portions of the conductive material to form the conductive leads and a centrally located pad; the leads of the leadframe are generally eventually electrically isolated from other leads and the pad.
To mechanically and electrically connect the device to the substrate, the device is adhesively attached to the pad of the leadframe and electrical contacts between the device and the leads are formed by wire bonding using thin conductive wires. Because the leads form electrical connections between the device and the substrate, each active input and output region of the device is coupled to a lead. The leadframe may then be mechanically attached and electrically coupled to the substrate by soldering the leads of the leadframe to bond pads located on the substrate.
Encapsulating methods and apparatus are generally configured to surround the microelectronic device, the wire bonds connecting the device to the leadframe, and a portion of the leadframe with an encapsulant, leaving at least a portion of the leads exposed to the surrounding environment. The non-encapsulated lead portion is free to connect the packaged device to the substrate.
Leaving a portion of the lead exposed to the environment may be problematic in several regards. For example, the exposed lead is susceptible to mechanical and chemical attack. In addition, the exposed lead portion may be undesirable because the impedance along the lead is dependent on the environment surrounding the lead. Thus, the impedance along the path of the lead changes as the environment surrounding the lead goes from an encapsulated environment to a non-encapsulated environment. In fact, the impedance variation between an encapsulated portion and non-encapsulated portion of the lead may be twenty ohms or more. Accordingly, assembly methods and apparatus that mitigate exposure of a lead to the surrounding environment are desirable.
The change of impedance along the length of the package lead may detrimentally affect the packaged device performance, particularly in high speed devices. In particular, electronic signals may be susceptible to distortion, which may be due to signal reflection. For example, when an electronic signal is transmitted from one device (e.g., a driver) to another device (e.g., a receiver) connected to the same substrate, signal reflection may occur if the signal travels through conductive media having different impedance values. This signal distortion may result in reduced device isolation and loss of signal quality. Accordingly, microelectronic device assembly methods and apparatus that reduce impedance variation along the length of a signal path are desirable.
Because impedance in a line is inversely proportional to the square root of the capacitance in the line, prior art methods for adjusting impedance in a lead line include increasing the line capacitance. The capacitance is increased by increasing the width of the lead line and/or decreasing the spacing between adjacent leads. However, these methods generally only allow for impedance adjustments of about one ohm. Accordingly, improved methods and apparatus for adjusting impedance values on a lead are desirable.
Other methods for reducing impedance variation between devices include using alternative packaging systems such as ball grid array modules or two-layer flexible circuits having signal lines. Although these systems reduce impedance variation, they may be less reliable and more expensive than leadframe packages. Therefore, the improved methods and apparatus for reducing impedance variation in an assembly preferably include use of leadframe packages.
SUMMARY OF THE INVENTION
The present invention provides improved methods and apparatus for attaching electronic devices to a substrate to form an assembly. While the ways in which the present invention addresses the drawbacks of the now-known device attachment techniques and apparatus are described in greater detail hereinbelow, in general and in accordance with various aspects of the present invention, the leads of a leaded package are coated such that the variation of impedance along the length of the lead is reduced.
In accordance with an exemplary embodiment of the present invention, exposed portions of the leads are coated with a material having a dielectric constant that is substantially the same as the dielectric constant of material surrounding the device. In accordance with one aspect of this embodiment, the lead coating also has a dielectric constant that is similar in value to the dielectric constant of the material surrounding conductive lines on the substrate.
In accordance with a further exemplary embodiment of the present invention, the exposed portions of the leads are coated with a material having a dielectric constant of about three to about five.
In accordance with another exemplary embodiment of the present invention, the device is attached to a leadframe, the active portions of the device are electrically coupled to the leads of the leadframe, the device and a portion of the leads are coated with an encapsulating material, the leadframe package is attached to the substrate, and the exposed portion of the leads are coated with a material.
In accordance with yet a further embodiment of the present invention, the impedance variation along the length of the lead may be further reduced by manipulating the line width and/or the spacing between the lead lines.


REFERENCES:
patent: 4942454 (1990-07-01), Mori et al.
patent: 5097317 (1992-03-01), Fujimoto et al.
patent: 5107325 (1992-04-01), Nakayoshi
patent: 5331205 (1994-07-01), Primeaux
patent: 5394298 (1995-02-01), Sagisaka
patent: 5438478 (1995-08-01), Kondo et al.
patent:

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