Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-11-30
2009-11-03
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S112000, C438S113000, C438S118000, C438S613000, C257SE21505, C257SE21511, C257SE21519, C257SE23021, C257SE23067, C257SE25013, C257SE29022
Reexamination Certificate
active
07611925
ABSTRACT:
An external terminal is formed on an interconnect pattern formed on a substrate by using a soldering material. Subsequently, a chip component having an electrode is mounted on the substrate. An interconnect for electrically connecting the electrode and the interconnect pattern is formed at a temperature lower than a melting point of the soldering material.
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Lebentritt Michael S
Oliff & Berridg,e PLC
Seiko Epson Corporation
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