Electronic device and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

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Details

C257S675000, C257S778000, C257SE23080, C438S122000, C438S127000

Reexamination Certificate

active

10539367

ABSTRACT:
The electronic device (100) is a chip-on-chip construction on a lead frame (10) comprising a heat sink (13) in an encapsulation (80). The first chip (20) and the second chip (30) are mutually connected by first conductive interconnections (24) and the first chip (20) is connected to the lead frame (10) by second conductive interconnections (27) which preferably have a lower reflow temperature than the first conductive interconnections (24). By heating the device (100) the adhesive layer (25) will first shrink, causing a stress, which will be relaxated by reflowing the second conductive interconnections (27).

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patent: 6225699 (2001-05-01), Frence et al.
patent: 6602737 (2003-08-01), Wu
patent: 6869827 (2005-03-01), Vaiyapuri
patent: 6967395 (2005-11-01), Glenn et al.
patent: 6987032 (2006-01-01), Fan et al.
patent: 7008823 (2006-03-01), Akram
patent: 7064009 (2006-06-01), McCann et al.
patent: 7112878 (2006-09-01), Akram
patent: 2002/0167079 (2002-11-01), Pu et al.
patent: 2005/0153483 (2005-07-01), Groenhuis et al.

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