Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2003-06-23
2004-09-07
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S739000, C438S740000, C257S293000, C257S458000
Reexamination Certificate
active
06787387
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating an electronic device including an infrared sensor, for example, and an electronic device to be preferably fabricated by such a method.
2. Description of the Related Art
An infrared sensor, including a plurality of bolometers on a semiconductor substrate, is known in the art. The infrared spectral responsivity of such an infrared sensor decreases when the heat, generated in the bolometers responsive to incident infrared radiation, is transmitted to the semiconductor substrate. Thus, to ensure sufficient infrared spectral responsivity, it is necessary to decrease the thermal transferability between the bolometers and the semiconductor substrate. For that purpose, Japanese Laid-Open Publication No. 2001-210877 discloses a technique of creating a cavity on the surface of a silicon substrate to thermally isolate the silicon substrate with a huge heat capacity from infrared detectors such as bolometers.
Hereinafter, the technique disclosed in Japanese Laid-Open Publication No. 2001-210877 mentioned above will be described with reference to
FIGS. 31A through 31G
. According to the conventional method, first, as shown in
FIG. 31A
, the surface of a silicon substrate
1001
is thermally oxidized locally to form a locally oxidized silicon (LOCOS) film
1002
thereon.
Next, as shown in
FIG. 31B
, a silicon nitride layer
1003
and a polysilicon film
104
are stacked in this order over the LOCOS film
1002
and the silicon substrate
1001
.
Thereafter, as shown in
FIG. 31C
, a plurality of holes
1005
are formed by photolithographic and dry etching processes so as to extend through the polysilicon film
1004
, silicon nitride layer
1003
and LOCOS film
1002
and reach the surface of the silicon substrate
1001
.
Subsequently, as shown in
FIG. 31D
, portions of the LOCOS film
1002
, which are exposed on the inner surfaces of the holes
1005
, are removed laterally by a wet etching process using buffered hydrofluoric acid. As a result, walls
1007
are defined by the remaining portions of the LOCOS the
1002
between the adjacent holes
1005
.
Next, as shown in
FIG. 31E
, a thin polysilicon film is deposited on the surface of the discontinued polysilicon film
1004
and on the inner surfaces of the holes
1005
and then the thin polysilicon film and the discontinued polysilicon film
1004
are oxidized together to form a continuous silicon dioxide layer
1010
. As a result of this process step, the holes
1005
are closed up with the silicon dioxide layer
1010
to define cavities
1011
as closed spaces.
Thereafter, as shown in
FIG. 31F
, a patterned conductor film
1012
with a zigzag planar shape, for example, is deposited on the silicon dioxide layer
1010
so as to function as an infrared detector.
By providing the cavities
1011
between the conductor film
1012
as a heat detector and the silicon substrate
1001
in this manner, the transfer of the heat from the infrared detector to the silicon substrate
1001
can be reduced, thus increasing the infrared spectral responsivity.
Hereinafter, another method for creating the cavities will be described. An infrared sensor, including cavities formed by such a method, is disclosed in Japanese Laid-Open Publication No. 05-126643, for example.
First, as shown in
FIGS. 32A and 32B
, a silicon dioxide layer
301
is deposited on a silicon substrate
300
. When a polysilicon film to be deposited in the next process step is etched, the silicon dioxide layer
301
will function as a lower etch stop layer.
Next, as shown in
FIGS. 33A and 33B
, a polysilicon film
302
is deposited on the silicon dioxide layer
301
and then patterned as shown in
FIGS. 34A and 34B
. The patterned polysilicon film
302
will function as a sacrificial layer to be etched away to form a cavity.
Subsequently, as shown in
FIGS. 35A and 35B
, another silicon dioxide layer
303
is deposited on the polysilicon film
302
and then an infrared detector
304
is formed on the silicon dioxide layer
303
as shown in
FIGS. 36A and 36B
.
Thereafter, as shown in
FIGS. 37A and 37B
, yet another silicon dioxide layer
305
is deposited over the infrared detector
304
. These silicon dioxide layers
303
and
305
function as an upper etch stop layer.
Then, as shown in
FIGS. 38A and 38B
, the silicon dioxide layers
303
and
305
are patterned to define cavity forming openings
306
. Portions of the polysilicon film
302
are exposed at the bottom of these openings
306
. Subsequently, hydrazine is introduced through the openings
306
of the silicon dioxide layers
303
and
305
, thereby etching the polysilicon film
302
. In this manner, a cavity
308
is formed as shown in
FIGS. 39A and 39B
.
In the method disclosed in Japanese Laid-Open Publication No. 2001-210877, the walls
1007
remain between the adjacent cavities
1011
as shown in FIG.
31
F. To increase the effects to be obtained by providing the cavities
1011
, the walls
1007
, having some thermal conductivity, are preferably removed. The walls
1007
may be removed by performing the etching process step shown in
FIG. 31D
long enough to leave no walls
1007
there. However, if the walls
1007
were removed at this early stage, then the silicon nitride layer
1003
and the polysilicon film
1004
would crack before the structure shown in
FIG. 31F
is completed. Such a phenomenon is believed to be caused by a thermal stress resulting from a difference in thermal expansion coefficient between the silicon nitride layer
1003
and the silicon substrate
1001
. That is to say, while the conductor film
1012
of polysilicon is annealed to activate a dopant that has been introduced into the conductor film
1012
and while the polysilicon film
1004
and the thin polysilicon film are thermally oxidized, a great thermal stress will be applied to the silicon nitride layer
1003
and silicon dioxide layer
1004
.
For that reason, according to the method disclosed in Japanese Laid-Open Publication No. 2001-210877, it is difficult to form a big cavity by removing the walls
1007
.
According to the method disclosed in Japanese Laid-Open Publication No. 05-126643 on the other hand, the polysilicon film
302
is removed by a chemical agent such as hydrazine, thus always requiring a drying process step to remove the chemical agent from the cavity
308
. However, when such a drying process step is carried out, a great stress is created in the portions of the silicon dioxide layers
303
and
305
that support the ceiling of the cavity
308
, thus possibly cracking those silicon dioxide layers
303
and
305
.
SUMMARY OF THE INVENTION
In order to overcome the problems described above, preferred embodiments of the present invention provide an electronic device, in which members defining the ceiling of a cavity are not cracked, and a method for fabricating such an electronic device.
A method for fabricating an electronic device according to a preferred embodiment of the present invention preferably includes the steps of: (a) preparing a cavity defining sacrificial layer, at least the upper surface of which is covered with an etch stop layer; (b) forming at least one first opening in the etch stop layer, thereby partially exposing the surface of the cavity defining sacrificial layer; (c) etching the cavity defining sacrificial layer through the first opening, thereby defining a provisional cavity under the etch stop layer and a supporting portion that supports the etch stop layer thereon; and (d) etching away a portion of the etch stop layer, thereby defining at least one second opening that reaches the provisional cavity through the etch stop layer and expanding the provisional cavity into a final cavity.
In one preferred embodiment, the step (d) preferably includes the step of etching at least a part of the supporting portion, which is located under the second opening, through the second opening.
In another preferred embodiment of the present invention, the method preferably further includes the step of
Ikushima Kimiya
Komobuchi Hiroyoshi
Uchida Mikiya
Akin Gump Strauss Hauer & Feld & LLP
Lee Calvin
Matsushita Electric - Industrial Co., Ltd.
Smith Matthew
LandOfFree
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