Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2011-06-28
2011-06-28
Stark, Jarrett J (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S460000, C438S462000, C257SE21599
Reexamination Certificate
active
07968378
ABSTRACT:
One embodiment provides a method of manufacturing semiconductor devices. For example, a sawn and expanded wafer is utilized having dielectrical material deposited between the diced and deposited chips. The method includes placing at least two chips on a metallic layer, depositing mold material on the metallic layer and between the chips, and selectively removing a portion of the mold material from the metallic layer to selectively expose a portion of the metallic layer. The method additionally includes covering the selectively exposed portion of the metallic layer with a conductive material, and singulating the at least two chips.
REFERENCES:
patent: 5155068 (1992-10-01), Tada
patent: 6159837 (2000-12-01), Yamaji et al.
patent: 6582990 (2003-06-01), Standing
patent: 6607970 (2003-08-01), Wakabayashi
patent: 6614104 (2003-09-01), Farnworth et al.
patent: 6624522 (2003-09-01), Standing et al.
patent: 6737750 (2004-05-01), Hoffman et al.
patent: 6767829 (2004-07-01), Akahori
patent: 6869824 (2005-03-01), Horng
patent: 6890845 (2005-05-01), Standing et al.
patent: 6946325 (2005-09-01), Yean et al.
patent: 7049177 (2006-05-01), Fan et al.
patent: 7091581 (2006-08-01), McLellan et al.
patent: 7344917 (2008-03-01), Gautham
patent: 7589410 (2009-09-01), Kim
patent: 7618886 (2009-11-01), Jobetto et al.
patent: 2002/0001747 (2002-01-01), Jenson et al.
patent: 2002/0094601 (2002-07-01), Su et al.
patent: 2002/0197771 (2002-12-01), Dotta et al.
patent: 2003/0022407 (2003-01-01), Sakamoto et al.
patent: 2004/0018667 (2004-01-01), Joshi et al.
patent: 2004/0082114 (2004-04-01), Horng
patent: 2004/0110323 (2004-06-01), Becker et al.
patent: 2004/0145044 (2004-07-01), Sugaya et al.
patent: 2006/0278972 (2006-12-01), Bauer et al.
patent: 2007/0001278 (2007-01-01), Jeon et al.
patent: 2007/0018313 (2007-01-01), Gomyo et al.
patent: 2008/0032236 (2008-02-01), Wallace et al.
patent: 2008/0246126 (2008-10-01), Bowles et al.
patent: 2010/0090322 (2010-04-01), Hedler et al.
Edward Furgut et al., “Taking Wafer Level Packaging to the Next Stage: A 200 mm Silicon Technology Compatible Embedded Device Technology”, Infineon Technologies AG, SEMICON Europa 2006, Munich, Germany, Apr. 4, 2006.
Fuergut Edward
Mahler Joachim
Vervoort Louis
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
Stark Jarrett J
LandOfFree
Electronic device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2651015