Ammunition and explosives – Igniting devices and systems – Ignition or detonation circuit
Patent
1995-06-07
1997-02-11
Nelson, Peter A.
Ammunition and explosives
Igniting devices and systems
Ignition or detonation circuit
102218, 102264, 10220213, 102292, 149 68, 149 77, 149 78, F23Q 702, C06B 2902
Patent
active
056023600
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to an igniter having a high-precision delay time, and, more particularly to an electronic delay electric detonator mainly used for firing an explosive to demolish rocks.
BACKGROUND TECHNOLOGY
An electronic delay igniter, as a substitute for a prior art chemical reaction-type igniter using a combustible composition, has been developed for greatly improving the precision of firing time. Electronic delay igniters, such as those disclosed in U.S. Pat. No. 4,445,435, U.S. Pat. No. 4,586,437, U.S. Pat. No. 4,712,477, Japanese Patent Application Publication No. 53479/1988. Japanese Patent Application Laid Open No. 111989/1986, Japanese Patent Application Laid Open No. 16582/1992, Japanese Patent Application Laid Open No. 79797/1993, are known.
These electronic delay detonators are divided into an analog type and a digital type depending on the delay means of the electronic timer unit, and the following three types are known.
The first is an analog type electronic timer using a CR circuit disclosed in U.S. Pat. No. 4,712,477. FIG. 1 is a block diagram of an electronic delay igniter using a CR circuit. As shown in the Figure, in this example, a resistor 1 and a capacitor 2 form a time constant circuit 3. The time constant circuit 3 is connected with a comparator circuit 4 for comparing a voltage stored in the capacitor 2 with a predetermined voltage, which detects a time at which the voltage stored in the capacitor 2 is the predetermined voltage. That is, the analog electronic timer uses the predetermined time when energy is supplied from a blasting machine (not shown) until the predetermined voltage is stored in the capacitor 2 as a delay time to output an output pulse after the lapse of a predetermined delay time. On the other hand, a circuit having an input resistor 5, a rectifier 6, and a voltage dividing resistors 7 and 8 is formed in a signal input unit. Firing energy is temporarily stored in a firing capacitor 9 through a rectifier 6, and this energy is supplied to an ignition unit through a switch circuit released by the output pulse output from the electronic timer after the delay time. Here, the switch circuit comprises switches 10 and 11, a latch 12, and a switch 13, and the ignition unit comprises a heater 14, and an ignition charge 15 which is in contact with the heater 14. Delay time of the electronic timer can be arbitrarily set by adjusting the resistance of the resistor 1 or the capacitance of the capacitor 2.
The second is a digital type electronic timer using a CR pulse oscillator disclosed in U.S. Pat. No. 4,586,437, and FIG. 2 is a block diagram of an electronic delay igniter using a CR pulse oscillator. As shown in the Figure, delay means of the electronic timer comprises an electronic timer circuit 21, a capacitor 22 and a resistor 23 which are connected to the electronic timer circuit 21, in which repeated charge and discharge of the capacitor 22 is made by a combination of the capacitor 22 and the resistor 23, and pulses having a generated predetermined frequency are counted by a counter circuit incorporated in an electronic timer circuit to output an output pulse. A signal input unit for a signal from the blasting machine is provided with a rectifier 24, a firing capacitor 25, and a constant voltage circuit 26. Further, firing energy temporarily stored in the firing capacitor 25 is supplied to an ignition unit comprising a heater 28 and an ignition charge 29 through a switching unit 27 which is released by the output pulse output from the electronic timer circuit after the lapse of the delay time.
The third is a digital type electronic timer using a solid state oscillator such as a quartz oscillator, which is disclosed in U.S. Pat. No. 4,445,435, Japanese Patent Application Publication No. 53479/1988, Japanese Patent Application Laid Open No. 11198/1986, Japanese Patent Application Laid Open No. 16582/1992, Japanese Application Laid Open No. 79797/1993.
The operation sequence of the above-described first to third electronic delay electric d
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Nishi Masaaki
Sakamoto Midori
Asahi Kasei Kogyo Kabushiki Kaisha
Nelson Peter A.
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