Electronic delay detonator

Details Electronic delay detonator Electronic delay detonator

1996-03-28

1997-02-11

Gaffin, Jeffrey A.

Electricity: electrical systems and devices

Igniting systems

For explosive devices

102217, F23Q 702

Patent

active

056027133

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to an electronic delay detonator for receiving energy only from a blasting unit, for driving a delay circuit based on the energy, and for igniting a detonator after a predetermined delay time.


BACKGROUND ART

In order to reduce vibration and noise in blasting, there has been proposed a blasting method which utilizes the interference of a blasting sound wave, in which method a precise explosion time control is required (the Japanese Patent Application Laid-Open (285800/1989).
A circuit for achieving the explosion time control having such precision, is an electronic delay detonator proposed in, for example, U.S. Pat. No. 4,445,435 granted to Atlas et al.
The electronic delay detonator includes an oscillating circuit using a crystal vibration element as a reference and a counter for counting output pulses from the oscillating circuit to digitally measure time, and is designed such that the counter is reset (initialized) based on a signal from a blasting unit.
FIG. 1 is a diagram showing a conventional electronic delay detonator, and FIG. 2 is a timing diagram of the operation of a conventional detonator.
The structure and operation of the conventional delay detonator will be described below with reference to FIG. 1 and 2.
In FIG. 1, a reference numeral 1 denotes a blasting unit. The blasting unit 1 is connected to input terminals 6-A and 6-B of an electronic delay detonator 16 via blasting unit busbars 2, auxiliary busbars 3, and lines 4. Reference numerals 5-1 to 5-6 are connection nodes therebetween.
A conventional electronic delay detonator 16 includes a signal detecting circuit 7, a rectifying circuit 8, an energy storing capacitor 9, an oscillating circuit 10, a counter 11, a discharge circuit 14, and an ignition heater 15.
To effect an explosion, the blasting unit 1 supplies to the electronic delay detonator 16 a signal as a reference for an explosion delay time; and also supplies the power, as energy, used to measure the explosion delay time, and to cause the explosion.
The power from the blasting unit 1 is supplied via the rectifying circuit 8 and stored in the energy storing capacitor 9, which constitutes an energy storing circuit.
An input voltage Vs shown in FIG. 2 is for the signal and the energy supply. The signal is transmitted as a change in the amplitude of the input voltage Vs; and it is detected by a detonator signal detecting circuit 7 of the electronic delay detonator 16.
When the input voltage Vs is applied to input terminals of the electronic delay detonator from the blasting unit 1, energy is stored in the energy storing capacitor 9, as shown as the voltage across terminals, of the energy storing capacitor in FIG. 2. After a period of time sufficient for the storage of energy in the energy storing capacitor 9, the application of input voltage is stopped at an arbitrary time. The change of the amplitude of the input voltage Vs is detected by the signal detecting circuit 7, which generates a reset signal R. The counter 11 is initialized in response to the reset signal R, and starts to count output pulses P from the oscillating circuit 10. After a delay time set in the counter 11, the counter 11 outputs a trigger signal. In response to the trigger signal, the discharge circuit 14 supplies the energy stored in the energy storing capacitor 9 to the ignition heater 15 for effecting the explosion.
The oscillating circuit 10 and counter 11 continue to operate even if the input voltage Vs is no longer applied, because the power is supplied from the energy storing capacitor 9.
In the conventional electronic delay detonator, when waveform distortion occurs in the waveform of input voltage Vs caused by any external factors, there is the possibility that Wave form distortion is detected by the signal detecting circuit. 7 and the reset signal is erroneously generated. In this case, the electronic delay detonator to which the input voltage Vs having the distortion is input would cause an explosion at a time earlier than that determined by any based on t

REFERENCES:
patent: 4395950 (1983-08-01), Oswald
patent: 4445435 (1984-05-01), Oswald
patent: 4586437 (1986-05-01), Miki et al.
patent: 5363765 (1994-11-01), Aikou et al.
patent: 5367957 (1994-11-01), Hennessey
PCT International Search Report dated Jul. 6, 1995.

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