Electronic counter for counting periodic clock signal generated

Details Electronic counter for counting periodic clock signal generated Electronic counter for counting periodic clock signal generated

1992-01-31

1993-06-22

Sikes, William L.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Counter controlled counter

377 16, 377 47, 377 48, 377 50, G06F 738

Patent

active

052221105

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention is related to an electronic counter with a counting circuit and a frequency divider connected upstream of the latter.
Electronic counters are used in many areas of technology. They serve to comprehend a constantly repeating process quantitatively. The counting function is triggered by applying an event-dependent clock frequency to the input of a counting circuit belonging to the counter. To the extent that an event is to be evaluated a frequency divider is connected prior to the counting circuit. As a result of this, the clock frequency is reduced in a fixed preset ratio so that the counting circuit counts correspondingly "slower". Such a counter can be adapted on an individual basis to its respective area of use as a result of the frequency divider connected upstream. However, insofar as a retuning or continuous adaptation is required during use the described known counter is not suitable.


SUMMARY OF THE INVENTION

According to the invention, the electronic counter for counting a periodic clock signal generated at a preset clock frequency includes a clock circuit generating the periodic clock signal at the preset clock frequency; an adjustable frequency divider having an output, a first input and a second input, the first input of the frequency divider being connected to receive the periodic clock signal and the second input of the frequency divider being connected to receive a cycle speed signal; and a counting circuit connected to the frequency divider to count the pulses received therefrom and to generate a counter reading. The frequency divider contains means to produce at the output thereof a pulsed output signal consisting of a plurality of pulses at a divider output frequency, the divider output frequency being substantially equal to the clock frequency divided by a factor depending on a constant and the cycle speed signal.
In contrast, the counter according to the invention has the advantage that its cycle speed is variable. For this purpose it has an adjustable frequency divider which has two inputs. A constant frequency is preferably fed to the first input. This constant frequency is divided by a factor. The magnitude of the factor, i.e. the evaluation, can be preset, as desired, by a cycle speed signal. The cycle speed signal is applied to a second input of the frequency divider in desired time intervals. The factor determining the divider ratio constantly retains its instantaneous value until a change occurs as a result of supplying a cycle speed signal diverging from the instantaneous cycle speed signal. This change leads to a different divider ratio, so that the electronic counter can be adapted individually to its specific area of use, this adaptation also being possible during operation.
According to a further development of the invention it is provided that the frequency is divided by the factor formed from the quotient of a constant and the cycle speed signal. Thus the frequency--which is preferably constant--is multiplied by the cycle speed signal and divided by the constant which is a quantity specific to the circuit. The counter results are accordingly dependent on the frequency on the one hand and on the preset cycle speed signal on the other hand.
It is preferably provided that the frequency fed to the first input is the clock frequency of a clock circuit.
According to another development of the invention the cycle speed signal is digitally preset externally. The error can accordingly be adapted to the individual given circumstances so-to-speak in a "remote controlled" manner.
The invention is further directed to an electronic counter with a counting circuit, a tracking circuit being arranged upstream of the latter. This tracking circuit causes a determined quantity of pulses assigned to it to be suppressed or an additional quantity of pulses to be added as a function of a presettable correction signal. Accordingly a continuous tracking of the counter reading is realized. This ensures that the counting sequence is maintained, i.e. no coun

REFERENCES:
patent: 4017719 (1977-04-01), Kaplan et al.
patent: 4471170 (1984-09-01), Akram
patent: 4741002 (1988-04-01), Dougherty
patent: 5066927 (1991-11-01), Dent

Affiliated with

Also associated with

Rating

Electronic counter for counting periodic clock signal generated does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electronic counter for counting periodic clock signal generated , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic counter for counting periodic clock signal generated will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1445356