Electronic control circuit for preventing abnormal operation of

Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...

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350332, 340784, 340813, 364136, 364184, 3072964, 307 38, G02F 113, G09G 336, H03K 301

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active

048488763

ABSTRACT:
In an electronic control system having a main CPU and a slave CPU which is under the control of the main CPU, a power control circuit is provided between the power source and the slave CPU to stop supplying power to the slave CPU until the main CPU starts normal operation when the power to the overall system is turned on. The slave CPU does not start operation until the main CPU becomes capable of normal operation and control over the slave CPU, which prevents unexpected action of the slave CPU and the subordinate control object. The power control circuit is also effective in preventing the abnormal action of the slave CPU when the power to the overall system is turned off.

REFERENCES:
patent: 3787752 (1974-01-01), Delay
patent: 4099247 (1978-07-01), Mikada et al.
patent: 4139278 (1979-02-01), Matsumoto et al.
patent: 4309701 (1982-01-01), Nishimura
patent: 4365316 (1982-12-01), Iwahashi et al.
patent: 4713659 (1987-12-01), Oyagi et al.
patent: 4748444 (1988-05-01), Arai
G. Hanchett, "Turn-On Reset Pulse Circuits" Technical Notes, a publication of RCA, Princeton, N.J., Apr. 1973.

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