Electronic computer including an information refreshing arrangem

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365222, G06F 1302, G06F 916

Patent

active

042042542

ABSTRACT:
The operative memory of the computer is of the MOS type and is cyclically refreshed under the control of logic circuits, in turn controlled by the timing unit during the microinstructions decoding. Particularly, every machine cycle in which an odd microinstruction is fetched, a row of memory locations is addressed for being refreshed during the same cycle, before the next following machine cycle is started, thus preventing any overlapping of refreshing operation with the CPU operation on the memory.

REFERENCES:
patent: 3518632 (1970-06-01), Threadgold
patent: 3631408 (1971-12-01), Kubo
patent: 3760379 (1973-09-01), Nibby, Jr.
patent: 3800295 (1974-03-01), Anderson, Jr.
patent: 4040122 (1977-08-01), Bodin
patent: 4073006 (1978-02-01), Tubbs
patent: 4084154 (1978-04-01), Panigrahi

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