Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2002-09-03
2004-11-30
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S668000, C257S666000
Reexamination Certificate
active
06825549
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a component with external flat conductors and a method for producing such a component.
In electronic components with external flat conductors for high-frequency analog and digital electromagnetic signals, the limiting frequencies lie at a few GHz. Although the semiconductor chips and integrated circuits on the semiconductor chip permit substantially higher limiting frequencies, the housings, in particular, the external flat conductors, of conventional electronic components are not capable of transmitting these higher frequencies.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an electronic component with external flat conductors and a method for producing the electronic component that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that can transmit high-frequency analog and digital electromagnetic signals of more than one hundred GHz from a semiconductor chip in the interior of the electronic component to contact connecting areas on a printed circuit board or on a multilayer ceramic substrate, and a method for the production of such an electronic component.
With the foregoing and other objects in view, there is provided, in accordance with the invention, an electronic component, including a dielectric body having an upper side and an underside opposite the upper side, a closed, electrically conductive covering layer disposed on the upper side, external flat conductor waveguides having a given characteristic impedance, the waveguides disposed on the underside of the dielectric body, and the conductive layer being coplanar with the waveguides and surrounding the waveguides.
According to the invention, an electronic component with external flat conductors is provided, the external flat conductors being waveguides with defined characteristic impedance. For such a purpose, the external flat conductors are disposed on an underside of a dielectric body and are surrounded in a coplanar manner by an electrically conductive layer on the underside of the dielectric body. On its upper side, the dielectric body has a closed electrically conductive covering layer.
Using such an electronic component with external flat conductors that are so constructed, it is possible to avoid mismatching of the line impedances such as those that occur when processing high-frequency analog or digital electromagnetic signals using conventional components. By constructing the external flat conductors as waveguides with a defined characteristic impedance, signal reflections, which disrupt the transmission, are suppressed. In particular, mismatching at the contact point between the external flat conductor and the line substrate of ceramic or to a printed circuit board is, therefore, minimized. Reflections can be tolerated only as long as the propagation time of the reflected interference signal is smaller than the rise time of the useful signal. Mismatching at the contact point between component housing and system printed circuit board or ceramic printed circuit board, therefore, has a more disruptive effect than mismatching at the contact point between integrated circuit and a component housing. Using the inventive configuration of the external flat conductors as waveguides with a defined characteristic impedance, one of the main sources of mismatching can, therefore, be virtually eliminated so that the inventive electronic component with external flat conductors permits a limiting frequency of more than a hundred GHz.
In accordance with another feature of the invention, the electrically conductive layer on the underside of the dielectric body and the covering layer on the upper side of the dielectric body are connected to each other through electrically conductive edge coatings of the dielectric body. By these layers, the dielectric body is virtually covered by an electrically conductive layer. This electrically conductive layer or electrically conductive covering of the dielectric body can be connected to a reference potential at any desired point on the covering and it is, therefore, possible to achieve the situation in which the reference potential is applied both to the upper side and to the underside of the dielectric body. The characteristic impedance of the external flat conductors can, therefore, be matched exactly in relation to this reference potential.
In accordance with a further feature of the invention, the electrically conductive layer and the covering layer are connected to a common ground potential. A very stable reference potential is, therefore, created for the dimensioning of the external flat conductors as waveguides. The electrically conductive layer on the upper side and on the underside of the dielectric body includes copper or a copper alloy in a further embodiment of the invention. Such metallic layers, as compared with electrically conductive oxidic layers, have the advantage of a lower electrical resistance and a defined alignment of the electromagnetic wave in relation to their surfaces. Copper or copper alloys also have the practical advantage that they adhere well to the dielectric body and, moreover, may be structured in a defined way. Therefore, the underside of the dielectric body can be processed to form exactly structured external flat conductors and an electrically conductive layer surrounding the external flat conductors in a coplanar manner.
In accordance with an added feature of the invention, the electrically conductive layer and the external flat conductors have contact connecting areas on which a solderable coating is disposed. This embodiment of the invention has the advantage that both the external flat conductors and the electrically conductive layer surrounding the external flat conductors can be connected to the ceramic substrate or the system printed circuit board by a soldered connection.
In accordance with an additional feature of the invention, the material thickness of the dielectric body increases gradually from a bonding end of the external flat conductor to a soldering end of the external flat conductor. With the gradual increase in the material thickness of the dielectric body, the characteristic impedance is influenced such that, in spite of the increase in the width of the external flat conductors, it remains constant from the bonding end to the soldering end, and, therefore, reflections are suppressed. High-frequency analog and digital electromagnetic signals can, therefore, be transmitted with controlled impedance.
In accordance with yet another feature of the invention, the width of the external flat conductor increases gradually from the bonding end to the soldering end. Such a configuration is used, firstly, for impedance matching, secondly, also for geometric matching of the external flat conductors in the area of the bonding point to the microscopically small grid dimension of the contact areas on the semiconductor chip and, in the area of the soldering point, to the macroscopic grid dimension of the contact connecting areas of the ceramic substrate or the system printed circuit board. In such a connection, microscopically small is understood to mean an order of magnitude that can be measured only under an optical microscope, and macroscopically large is understood to mean an order of magnitude that can be seen and measured with the naked eye.
In accordance with yet a further feature of the invention, the spacing between the external flat conductors and the surrounding electrically conductive layer increases gradually from the bonding end to the soldering end of each external flat conductor, in the form of a widening slot. With such an increase, it is possible to take care that, in spite of the widening external flat conductor, the characteristic impedance remains constant over the length of the external flat conductor. Thus, substantially three measures influence the possible matching of the characteristic impedance to the length of the external flat conductor, nam
Cao Phat X.
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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