Electronic component package assembly and method of...

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Reexamination Certificate

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Details

C257S704000

Reexamination Certificate

active

06403881

ABSTRACT:

This invention relates to an electronic component package assembly and method of manufacturing the same. More particularly, the invention relates to a packaging assembly for semiconductor chips and other electrical components including optical electronic components requiring an optical lid.
Most integrated circuits and discrete semiconductor devices are provided in standard package forms such as DIL (Dual-in-Line) and T018 packages. These types of packages need through holes in a printed circuit board for the their pins or leads to protrude through and to be soldered on the underside of the board to make both electrical and mechanical connection to the board and the tracks on the board.
Surface mount assembly technology has been developed in which packaged components do not have pins or leads. Instead, the packaged component is placed on a surface of a circuit board, on either side of the board or both sides of the board. Surface mount assembly is regarded as a more refined process than through hole assembly techniques. Finer pitch contacts are possible coupled with the fact that all four sides of a component package are usable thus enabling packages to be smaller with typical space savings in the region of 4:1 when comparing through hole assembly techniques with surface mount assembly techniques.
Even taking into account the savings in assembly board areas which surface mount assembly techniques provide, the trend has been to increase the density of components which populate a board thereby leaving the component package with higher pin counts which can be up to several hundred pins.
In the past, some components were used in die or naked form (i.e. unpackaged) in what are called hybrid circuits. Such unpackaged components were usually placed on a ceramics substrate along with necessary tracks, resistors and capacitors. The process for manufacturing the tracks, resistors and some capacitors is known as “print and fire”. The “print and fire” technique is especially useful where reproductability of size and weight are critical or power dissipation is high. However, the “print and fire” process is expensive and the requirements of most applications can be met using surface mount assembly technology.
Pin counts are continuing to rise and are set to increase on average two or three times every five years. One technology which has been developed to help with the high pin count problems is Multi-Chip Modules (MCMs). This technology is also of assistance when dealing with the higher clock speeds now being used in the electronics industry. MCM technology basically packages the high pin count chips that need to interconnect with one another onto a dedicated substrate which can be silicon, alumina or a laminate. The substrate is then put into a package with a more conventional pin pitch for example 1.27 mm or 2.54 mm to form a chip. The chips used are usually in unpackaged (die
aked) form, although some very small packaged components can also be used within MCMs. The main concept is to have the critical, fast high pin count and high interconnect density circuitry in one or more special MCM assemblies which can then be fitted onto more conventional assemblies.
MCM technology is still very costly due to the special materials and assembly required. The final size of an MCM is governed by the package size of the overall module which is a function of the number of “out” pins which the module is required to possess and the interconnect density capability required within the MCM. This last factor is dependent on the line spacing capability and chip to substrate connection method within the module.
The types of interconnection possible between an electronic component and a substrate and/or a package are wire bonding, tape automated bonding and flip-chip which each have their own advantages and disadvantages. In high density assemblies, the power dissipation and the capability to remove heat generated thereby is an important factor.
With the advent of multi-media computerisation and the Internet as well as a general high growth in optical devices, there is now a need to produce high volume low cost optical packages and interconnects which are capable of being multi-component and used in surface mount technologies and which have automatic handling capability.
It is an object of this invention to provide a high density surface mount interconnect package for optical devices such as sensors and displays which can be used within MCM at one extreme or as a simple package electronic component at the other extreme.
It is further object of the invention to provide an electronic component package assembly constructed in arrays.
It is a further object of the invention to provide an economical electronic components package assembly and method of making the same.
Another object of the present invention is to reduce the size of electronic component packages compared to the package sizes required for other technologies.
Accordingly, one aspect of the present invention provides an electronic component package assembly comprising: a substantially planar base carrying a number of cavities each defined by a frame; an electronic component attached to the base within each cavity; and a lid fixed to the frame such that, in combination, the base, the lid and each frame define an enclosed volume housing the electronic component.
Conveniently, a plurality of tiles are derived from a single panel comprising a base layer attached to a frame layer.
Conveniently, the lid is manufactured from a transparent material.
Advantageously, at least one raised portion is upstanding above each frame to ensure the lid is spaced from the frame by a predetermined gap, the gap being filled with an adhesive to fix the lid of the frame.
Preferably, the enclosed volume housing the electronic component is at least partly filled with a protective compound.
Advantageously, the electronic component is a flip-chip, the base being formed with a cut-out substantially adjacent an optical surface of the chip, the cut-out being covered with a transparent material.
Another aspect of the present invention provides a method of manufacturing a package for an electronic component comprising the steps of:
providing a substantially planar base having a number of cavities each defined by a frame; attaching an electronic component to the base within each frame;
fixing a lid to the frames such that, in combination, the base, the lid and each frame define an enclosed volume housing the electronic component; and
separating from the assembly a number of packages each having a base portion, an electronic component attached to the base, a frame surrounding the electronic component and a lid portion fixed to the frame.


REFERENCES:
patent: 5473191 (1995-12-01), Tanaka
patent: 5734155 (1998-03-01), Rostoker
patent: 5827755 (1998-10-01), Tonehara et al.
patent: 6194782 (2001-02-01), Katchmar

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