Electronic component package and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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Details

C257SE23001, C257SE21499, C438S106000

Reexamination Certificate

active

07906838

ABSTRACT:
An electronic component package includes: a base having a top surface and a side surface; and a plurality of layer portions stacked on the top surface of the base, each of the layer portions including at least one electronic component chip. The base includes a plurality of external connecting terminals, and a retainer for retaining the plurality of external connecting terminals. Each of the external connecting terminals has an end face located at the side surface of the base. At least one of a plurality of electronic component chips that the plurality of layer portions include is electrically connected to at least one of the external connecting terminals.

REFERENCES:
patent: 5475264 (1995-12-01), Sudo et al.
patent: 5926380 (1999-07-01), Kim
patent: 2002/0180010 (2002-12-01), Tsubosaki et al.
patent: A-2001-035993 (2001-02-01), None
patent: A-2001-244403 (2001-09-01), None
patent: A-2003-163324 (2003-06-01), None
U.S. Appl. No. 11/706,376, filed Feb. 15, 2007 in the name of Yoshitaka Sasaki et al.
U.S. Appl. No. 11/806,047, filed May 19, 2007 in the name of Yoshitaka Sasaki et al.

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