Electronic circuit unit suitable for miniaturization

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For high frequency device

Reexamination Certificate

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Details

C257S275000, C257S277000, C257S482000, C257S604000, C257S737000

Reexamination Certificate

active

06759744

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electronic circuit unit suitably applied to a transmitting-receiving unit of a cellular phone.
2. Description of the Prior Art
A conventional electronic circuit unit, e.g., a transmitting-receiving unit, has one insulating substrate on which a wiring pattern is provided, on which passive elements such as a chip resistor and a capacitor, and active elements and the like comprising ICs are mounted to form an RF circuit and a base band circuit.
Since a conventional electronic circuit unit is configured with one insulating substrate, it becomes large in a width direction, posing the problem that miniaturization in a width direction cannot be achieved.
Another problem is that passive elements are difficult to make electric adjustments to because of use of chips, and variations in electric accuracy of the chips reduce electric performance capabilities and yields in manufacturing processes.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an electronic circuit unit that can be miniaturized in a width direction and has excellent electric performance capabilities.
As a first solving means for solving the above problems, an electronic circuit unit of the present invention includes first and second insulating substrates on the respective surfaces of which wiring patterns are formed, and thick-film or thin-film passive elements formed on the surfaces of the first and second insulating substrates in a state in which they are connected to the wiring patterns, wherein the first and second insulating substrates are disposed vertically opposite to each other, and the wiring patterns provided on the first and second insulating substrates are connected through metallic bumps provided between the first and second insulating substrates.
As a second solving means, active elements comprising ICs, connected to the wiring patterns, are disposed on the first and second insulating substrates, respectively.
As a third means, first and second electric circuits including the passive element and the active element are formed on the first and second insulating substrates, respectively.
As a fourth means, the first electric circuit is configured with an RF circuit and the second electric circuit is configured with a base band circuit.
As a fifth solving means, the active elements include the first and second active elements, the first insulating substrate on which the first active element is disposed is provided with a hole, and the second active element disposed on the surface of the second insulating substrate is disposed within the hole.
As a sixth solving means, the first active element is disposed on the first insulating substrate in such a manner as to cover the hole.
As a seventh solving means, the respective surfaces of the first and second insulating substrates are provided with concave positioning parts for positioning the bumps.
As an eighth means, the positioning parts are formed by through holes provided on the insulating substrates, and the spherical bumps are positioned in the positioning parts.
As a ninth solving means, the positioning parts are formed by the conical, concaves provided on the insulating substrates, and the spherical bumps are positioned in the positioning parts.


REFERENCES:
patent: 5459368 (1995-10-01), Onishi et al.
patent: 5821627 (1998-10-01), Mori et al.
patent: 6238951 (2001-05-01), Caillat
patent: 6263193 (2001-07-01), Iseki et al.
patent: 6396116 (2002-05-01), Kelly et al.
patent: 6400019 (2002-06-01), Hirashima et al.
patent: 6521483 (2003-02-01), Hashimoto
patent: 08-274575 (1996-10-01), None

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