Electronic circuit package

Details Electronic circuit package Electronic circuit package

2007-03-07

2008-09-16

Nguyen, Viet Q (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S723000, C257S676000, C257S635000, C257S678000

Reexamination Certificate

active

07425763

ABSTRACT:
An electronic apparatus which includes a wiring substrate which includes wiring conductors, and a plurality of semiconductor bare chips that are formed on the wiring substrate. The semiconductor bare chips include a processor for processing data and a circuit having a checking function for detecting faults of the processor.

REFERENCES:
patent: 4144561 (1979-03-01), Tu et al.
patent: 4172282 (1979-10-01), Aichelmann, Jr. et al.
patent: 4432055 (1984-02-01), Salas et al.
patent: 4441075 (1984-04-01), McMahon
patent: 4441164 (1984-04-01), Pavan et al.
patent: 4577293 (1986-03-01), Matick et al.
patent: 4602271 (1986-07-01), Dougherty, Jr. et al.
patent: 4631686 (1986-12-01), Ikawa et al.
patent: 4649474 (1987-03-01), Ambrosius, III et al.
patent: 4689658 (1987-08-01), Akasaki et al.
patent: 4722130 (1988-02-01), Kimura et al.
patent: 4746966 (1988-05-01), Fitzgerald et al.
patent: 4773044 (1988-09-01), Sfarti et al.
patent: 4783695 (1988-11-01), Eichelberger et al.
patent: 4803682 (1989-02-01), Hara et al.
patent: 4807284 (1989-02-01), Kleijne
patent: 4811288 (1989-03-01), Kleijne et al.
patent: 4907062 (1990-03-01), Fukushima
patent: 4918811 (1990-04-01), Eichelberger et al.
patent: 4922363 (1990-05-01), Long et al.
patent: 4922379 (1990-05-01), Estes, Jr.
patent: 4933898 (1990-06-01), Gilberg et al.
patent: 4947183 (1990-08-01), Yagino
patent: 4979289 (1990-12-01), Dunaway et al.
patent: 4993148 (1991-02-01), Adachi et al.
patent: 5016087 (1991-05-01), Haug et al.
patent: 5017993 (1991-05-01), Shibata
patent: 5019943 (1991-05-01), Fassbender
patent: 5028986 (1991-07-01), Sugano et al.
patent: 5050039 (1991-09-01), Edjors
patent: 5068850 (1991-11-01), Moore
patent: 5072283 (1991-12-01), Bolger
patent: 5081563 (1992-01-01), Feng et al.
patent: 5128737 (1992-07-01), Van der Have
patent: 5138438 (1992-08-01), Masayuki et al.
patent: 5149940 (1992-09-01), Davis et al.
patent: 5173844 (1992-12-01), Adachi et al.
patent: 5182632 (1993-01-01), Bechtel et al.
patent: 5185717 (1993-02-01), Mori
patent: 5200810 (1993-04-01), Wojnarowski et al.
patent: 5237203 (1993-08-01), Massaron
patent: 5241456 (1993-08-01), Marcinkiewicz et al.
patent: 5243208 (1993-09-01), Isomura et al.
patent: 5285107 (1994-02-01), Kazami et al.
patent: 5303120 (1994-04-01), Michii et al.
patent: 5325265 (1994-06-01), Turlik et al.
patent: 5371390 (1994-12-01), Mohsen
patent: 5391917 (1995-02-01), Gilmour et al.
patent: 5468992 (1995-11-01), Kanekawa et al.
patent: 5552633 (1996-09-01), Sharma
patent: 5576554 (1996-11-01), Hsu
patent: 5594890 (1997-01-01), Yamaura et al.
patent: 5614761 (1997-03-01), Kanekawa et al.
patent: 5677569 (1997-10-01), Choi et al.
patent: 5757592 (1998-05-01), Arai et al.
patent: 5768613 (1998-06-01), Asghar
patent: 5789805 (1998-08-01), Kanekawa et al.
patent: 6195742 (2001-02-01), Kanekawa et al.
patent: 6223273 (2001-04-01), Kanekawa et al.
patent: 6324114 (2001-11-01), Hineno
patent: 6376917 (2002-04-01), Takeshita et al.
patent: 6584004 (2003-06-01), Kanekawa et al.
patent: 6728904 (2004-04-01), Kanekawa et al.
patent: 7120069 (2006-10-01), Kanekawa et al.
patent: 2001/0022739 (2001-09-01), Funaba et al.
patent: 2001/0024389 (2001-09-01), Funaba et al.
patent: 2001/0033013 (2001-10-01), Lee
patent: 2002/0040261 (2002-04-01), Nakamoto et al.
patent: 2002/0056911 (2002-05-01), Iwaya et al.
patent: 2003/0131228 (2003-07-01), Tworney
patent: 62162749 (1987-07-01), None
patent: 1220498 (1989-09-01), None
patent: 1258466 (1989-10-01), None
patent: 2289014 (1990-11-01), None
patent: 408147197 (1996-06-01), None
Data Book “Hitachi IC Memory Data Book”, Hitachi, HB56A49 Series, 4194304-word x 9-bit High Density Dynamic RAM Module, pp. 1-8 (English Translation).
Data Book “Hitachi IC Memory Data Book”, Hitachi, HB56D51236 Series 524288-word x 36-bit High Density Dynamic RAM Module, pp. 1-10 (English Translation).
Synchronous Dram Module; Advance 64 MEG &72 Registered SDRAM DIMM; pp. 1-17.
19404-word X 9-bit High Density Dynamic RAM Module; pp. 849-857.

Affiliated with

Also associated with

Rating

Electronic circuit package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electronic circuit package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic circuit package will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3971208