Electric power conversion systems – Current conversion – With voltage multiplication means
Patent
1996-10-23
1998-01-06
Wong, Peter S.
Electric power conversion systems
Current conversion
With voltage multiplication means
363 60, 307110, H02M 318
Patent
active
057061882
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to electronic circuits for converting electrical energy of the type described in French patent application FR 2 679 715 A1, and to a power supply installation making use thereof.
The converter described in that patent application is shown, by way of example, in accompanying FIG. 1. It essentially comprises, between a voltage source SE and a current source C, a succession of controllable switching cells CL1, CL2, . . . , CLn, each having two switches T1, T'1; T2, T'2; . . . ; Tn, T'n, with one pole of each of the two switches forming part of a pair of upstream poles and the other pole of each of the switches forming part of a pair of downstream poles, the pair of downstream poles of an upstream cell being connected to the pair of upstream poles of a downstream cell, and the pair of upstream poles of a first cell CL1 being connected to said current source C, while the pair of downstream poles of a last cell CLn is connected to said voltage source SE, the converter also comprising a respective capacitor C1, C2, . . . , Cn for each cell, except that the capacitor of the last cell may be omitted when said voltage source SE is suitable for performing the same role, each capacitor being connected between the two poles constituting the pair of downstream poles of its cell, the converter further having control means (not shown) governing the nominal operation of the converter and acting on the switches of the successive cells in such a manner that the two switches of any one cell are always in respective opposite conduction states (represented by control links such as lc1), such that in response to a cell control signal delivered by said control means, one of the two switches in a given cell is successively in a first conduction state and then in a second conduction state during a cyclically repeated converter period, and such that in response to cell control signals that are identical but offset in time by a fraction of said converter period, the switches of successive cells function respectively in the same manner but offset in time by said fraction of a period.
Preferably, said fraction of a period is equal to the reciprocal of the number n of cells, i.e. 2.pi.
, which is optimal with respect to harmonics generated on the output and which enables the voltages charged on the capacitors of the converter to be balanced naturally. Some other offset is nevertheless conceivable, as are different offsets between the various stages.
In such a converter, the successive capacitors C1, C2, . . . , Cn have respective increasing mean charge voltages, the mean charge voltage of the capacitor associated with each of said cells being equal to the product of a voltage VE delivered by said voltage source SE multiplied by the reciprocal of the number of cells in the converter and by the rank of the cell, i.e. VE/3, 2VE/3, VE when n=3, i.e. when the converter has only three cells.
Naturally, the above applies to other values of n, providing n is not less than two, and in particular when n is greater than three.
The term "multilevel converter" is used below to designate a converter that satisfies the above description.
The object of the present invention is to make provision in such a multilevel converter for the charge on each capacitor to remain in compliance with the above description, in spite of inevitable departures from nominal operating conditions.
To examine more easily how the charge ought nominally to vary on one of the capacitors of a multilevel converter as described above, reference is made to FIG. 2 which shows an arbitrary switching cell CLk together with its switches Tk and T'k, the capacitor Ck associated with the cell, and also the following cell CLk+1 and its switches Tk+1, T'k+1.
Given the coupling between the switches within each cell, Tk and T'k or Tk+1 and T'k+1, the set of two adjacent cells CLk and CLk+1 shown in FIG. 2 has four states:
a) a first state where Tk and Tk+1 are non-conducting, so the charge voltage on Ck does not change;
b) a second s
REFERENCES:
patent: 5132895 (1992-07-01), Kase
patent: 5345376 (1994-09-01), Nourbakhsh
Bethoux Olivier
Carrere Philippe
Gonzalez Juan
Lavieville Jean-Paul
Meynard Thierry
GEC Alsthom Transport SA
Riley Shawn
Wong Peter S.
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