Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2005-03-29
2008-12-02
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
Reexamination Certificate
active
07460093
ABSTRACT:
To reduce a time for applying a target voltage to a gate of a driving transistor. During an initializing period, both ends of a capacitive element become a short-circuited state by turning on transistors, so that node A and B becomes a voltage made by subtracting the threshold voltage Vthpof the driving transistor from a power source voltage VEL. During a writing period, the transistor is turned on and a data signal X-j is supplied to change the voltage at the node B as much as a voltage corresponding the current which is to flow into an OLED element. The node A is changed from the threshold voltage as much as the value obtained by dividing the voltage change by capacity ratio. During a light-emitting period, the transistor is turned on, so that the current corresponding to the voltage at the node A flows through the OLED element.
REFERENCES:
patent: 6229506 (2001-05-01), Dawson et al.
patent: 2003/0122745 (2003-07-01), Miyazawa
patent: 2005/0088378 (2005-04-01), Ozawa et al.
patent: A 2003-177709 (2003-06-01), None
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U.S. Appl. No. 10/923,725, filed Aug. 24, 2004, Ozawa et al.
Kanda Eiji
Nozawa Ryoichi
Ozawa Tokuro
Hjerpe Richard
Oliff & Berridg,e PLC
Pervan Michael
Seiko Epson Corporation
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