Electronic circuit device with multi-layer wiring

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257773, 257774, 257758, 257760, 257381, 257382, 257637, H01L 2976, H01L 2348, H01L 2352

Patent

active

059905557

ABSTRACT:
An electronic circuit having: a substrate with an upper surface; a lower level wiring made of conductive material and disposed on the substrate; an insulating cover film covering the surface of the lower level wiring; an interlayer insulating film formed on the substrate, covering the insulating cover film; an opening formed through the interlayer insulating film and the insulating cover film at an interlayer contact region extending from an area corresponding to the inside region, as viewed in the in-plane layout of the substrate, of the lower level wiring to an area corresponding to the outside region of the lower level wiring; and a higher level wiring disposed on a partial region of the interlayer insulating film and in the interlayer contact region, the higher level wiring being electrically connected to the lower level wiring in the interlayer contact region. The connection reliability between a lower level wiring layer and a higher level wiring layer in the connection region can be improved while maintaining the insulation reliability therebetween in the insulation region.

REFERENCES:
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patent: 4900695 (1990-02-01), Takahashi et al.
patent: 4943539 (1990-07-01), Wilson et al.
patent: 5068711 (1991-11-01), Mise
patent: 5523257 (1996-06-01), Yamazaki et al.
patent: 5581102 (1996-12-01), Kusumoto
patent: 5616960 (1997-04-01), Noda et al.
patent: 5621224 (1997-04-01), Yamazaki et al.
patent: 5668379 (1997-09-01), Ono et al.

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