Electronic assembly with separate power and signal connections

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S261000, C174S262000, C257S684000, C257S698000, C361S777000, C361S803000

Reexamination Certificate

active

06627822

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to electronic circuits, assemblies and the like, and more particularly to an electronic assembly with separate power and signal connectors or connections.
BACKGROUND INFORMATION
In electrically connecting a semiconductor chip, socket or other electronic device to a printed circuit board or the like, two types of electrical connections typically need to be made. One type of connection or group of connections is to deliver power to the semiconductor chip or electronic device and the other type of connection or group of connections is to provide transmission of signals or data between the chip or device and other components on the printed circuit board or elsewhere. Power delivery is a relatively low frequency problem that relies on the bulk property of the conductive material to deliver sufficient current to the chip, device or die or to be able to carry at least the amount of current required or expected to be provided to the chip or device without being damaged or overheated and causing damage to other components. Signal integrity is a relatively high frequency problem that relies on smooth or seamless interfaces or transitions at points or nodes where conductors are joined or soldered together. As chips and other devices are required to perform more functions or operations in shorter periods of time, power requirements and signal requirements for semiconductor chips are continually increasing. The higher power requirements are solved by adding more conductors or power pins that take up more area on the chip and board and result in difficulty in delivering clean power to the devices. Additionally, the increased signal requirements call for additional connections that compete with the increased number of power connections for area on the chip and board. Further, the close proximity of the power and signaling connections can result in electromagnetic interference in delivering error free signaling.
One arrangement for making power connections and signal connections between a printed circuit board and a chip or device or a socket into which the chip or device are mounted involves using solder balls or a ball grid array (BGA) or similar arrangement for both power and signal connections or delivery. Another arrangement for making power and signal connections utilizes a multiplicity of pins attached to the socket or device that are inserted into holes or recesses formed in the circuit board for both power and signal connections. Because the current carrying requirements are much larger for a connection providing power compared to the current carrying requirement for a connection carrying data signals, and because all of the pins or solder balls in both arrangements above are the same size and therefore have the same current carrying capacity, a multiplicity of balls or pins are required to be used in the aggregate to satisfy the power delivery requirements of high performance chips. Hundreds of balls or pins are usually needed to provide the power and ground connections.
The pin contact for a signal connection also may not be as good or reliable as a re-flowed solder ball connection. Smooth or seamless interfaces are more reliable in providing the delivery of clean signals.
Accordingly, for the reasons stated above, and for other reasons that will become apparent upon reading and understanding the present specification, there is a need for an electronic assembly for making power and signal connections between two substrates or between a semiconductor chip, socket or other device and a circuit board or the like that separates the power and signal connections, utilizes the appropriate type of connection and size and shape connection for the function being performed, makes efficient use of available area for making power and signal connections by minimizing the area on the chip or die and on the circuit board needed for making power and signal connections, and may be made efficiently with compatible manufacturing techniques or processes to form both the power and signal connections.


REFERENCES:
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 4814857 (1989-03-01), Werbizky
patent: 5338970 (1994-08-01), Boyle et al.
patent: 6290334 (2001-09-01), Ishinaga et al.
patent: 6356166 (2002-03-01), Goldsmith et al.

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