Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1999-08-31
2001-10-09
Everhart, Caridad (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S684000
Reexamination Certificate
active
06300677
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuits and capacitors. More particularly, the present invention relates to an apparatus formed by coupling a capacitor assembly to the underside of a semiconductor integrated circuit substrate, and then coupling the assembly formed thereby to a package.
2. The Background Art
In integrated circuit electronics, there often exists a need to use external capacitors to filter unwanted signals from conductive paths in order to ensure signal integrity at the receiving end of the conductor.
Capacitors are commonly used in filters which pass desirable frequencies and prevent the transmission of undesirable frequencies.
Filters with series capacitors are typically used to prevent low frequencies from being transmitted along a conductive path which is used to transmit desirable high frequency signals, and filters with shunt capacitors may be used to filter high frequencies from conductive paths used for supplying power to a region of circuitry. Typically, the capacitors used in these latter filters are integrated onto a semiconductor integrated circuit substrate if they have small values of capacitance, and are external to the semiconductor integrated circuit substrate if they have large values of capacitance.
FIGS. 1A and 1B
are a side view and top view respectively of an integrated circuit substrate mounted on a package, with the resulting combination being mounted on a printed circuit board.
Referring to
FIGS. 1A and 1B
, integrated circuit
10
is shown including a multilayer package
12
, an integrated circuit substrate
14
, and a capacitor
16
. Solder bumps
18
connect substrate
14
to package
12
. Solder balls
20
connect package
12
to multilayer circuit board
22
. Two conductive paths connect substrate
14
to capacitor
16
, and two other conductive paths connect substrate
14
to capacitor
24
.
In an integrated circuit, there are typically two types of connections made between a package and the integrated circuit substrate. First, there are input/output (I/O) connections, which typically connect the integrated circuit substrate to external environment signal sources and signal destinations. Second, there are core connections which provide connections between integrated circuit substrate circuitry and external components such as capacitors and resistors. Core connections have no external signal sources or signal destinations associated with them, and are typically centered on the integrated circuit substrate, completely surrounded by I/O connections.
Capacitors
16
and
24
are provided as examples of components designed into a system for the purpose of filtering unwanted signal frequencies from a conductive path. Although these capacitors function properly for their intended purpose, the conductive paths between the substrate and each of capacitors
16
and
24
have a characteristic high inductance which inhibits the effectiveness of the capacitors for high signal frequencies.
It is well known in the art that series inductances impede the passage of signals at higher frequencies, and series capacitances impede the passage of signals at lower frequencies. Shunt capacitors are capacitors provided between a conductive path and ground in order to shunt unwanted higher frequencies to ground. However, resistances and inductances in series with these shunt capacitors inhibits their effectiveness for this purpose.
The present invention provides a electronic assembly which provides capacitive filtering, while providing low resistance, low inductance connections between the integrated circuit substrate and the package.
SUMMARY OF THE INVENTION
An electronic assembly is described herein having a first semiconductor integrated circuit substrate with circuitry disposed thereon. This semiconductor integrated circuit substrate is coupled with a package through a first plurality of electrical connections. Sandwiched between portions of the semiconductor integrated circuit substrate and the package is an electronic assembly which is coupled to the semiconductor integrated circuit substrate circuitry, and also to the package through low resistance, low inductance connections.
An electronic subassembly is described which includes a second semiconductor substrate having circuitry disposed thereon, the circuitry forming one or more of a capacitor, a charge pump, or a voltage regulator. Insulating material is disposed over the circuitry, and vias are formed therethrough. Metal bands are disposed to be continuous around the outside of the subassembly, thereby also forming connections with the second semiconductor circuitry. The electronic subassembly metal bands then make low resistance, low inductance connections with the circuitry of the first semiconductor integrated circuit substrate and the package.
REFERENCES:
patent: 4675717 (1987-06-01), Herrero et al.
patent: 6005812 (1999-12-01), Mullarkey
Anonymous. “Logically controlled chip interconnection technique”, IBM Tech. Discl. Bull. vol. 32, No. 3B, pp. 294-299, Aug. 1989.
Everhart Caridad
Lewis Sean P.
Sun Microsystems Inc.
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