Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2000-08-31
2004-04-20
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S706000, C257S707000, C257S720000, C257S675000, C257S779000, C257S783000, C438S122000, C438S125000, C438S612000, C438S118000
Reexamination Certificate
active
06724078
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
Embodiments of the present invention relate generally to electronics packaging. More particularly, the present invention relates to an electronic assembly that includes an integrated circuit package comprising a solderable thermal interface between the integrated circuit and a heat spreader to dissipate heat generated in a high speed integrated circuit, and to manufacturing methods related thereto.
BACKGROUND INFORMATION
Integrated circuits (ICs) are typically assembled into packages by physically and electrically coupling them to a substrate made of organic or ceramic material. One or more IC packages can be physically and electrically coupled to a printed circuit board (PCB) to form an “electronic assembly”. The “electronic assembly” can be part of an “electronic system”. An “electronic system” is broadly defined herein as any product comprising an “electronic assembly”. Examples of electronic systems include computers (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, MP3 (Motion Picture Experts Group, Audio Layer 3) players, etc.), and the like.
In the field of electronic systems there is an incessant competitive pressure among manufacturers to drive the performance of their equipment up while driving down production costs. This is particularly true regarding the packaging of ICs on substrates, where each new generation of packaging must provide increased performance while generally being smaller or more compact in size. As the power demands of high performance IC processors approach and even exceed 100 watts per chip, with localized power densities exceeding 200 watts/square centimeter, the heat dissipating capability of the IC package must correspondingly increase.
An IC substrate may comprise a number of metal layers selectively patterned to provide metal interconnect lines (referred to herein as “traces”), and one or more electronic components mounted on one or more surfaces of the substrate. The electronic component or components are functionally connected to other elements of an electronic system through a hierarchy of electrically conductive paths that include the substrate traces. The substrate traces typically carry signals that are transmitted between the electronic components, such as ICs, of the system. Some ICs have a relatively large number of input/output (I/O) terminals, as well as a large number of power and ground terminals.
One of the conventional methods for mounting an IC on a substrate is called “controlled collapse chip connect” (C4). In fabricating a C4 package, the electrically conductive terminations or lands (generally referred to as “electrical contacts”) of an IC component are soldered directly to corresponding lands on the surface of the substrate using reflowable solder bumps or balls. The C4 process is widely used because of its robustness and simplicity.
As the internal circuitry of ICs, such as processors, operates at higher and higher clock frequencies, and as ICs operate at higher and higher power levels, the amount of heat generated by such IC's can increase to unacceptable levels.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a significant need in the art for a method and apparatus for packaging an IC on a substrate that minimizes heat dissipation problems associated with high clock frequencies and high power densities.
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Sur Biswajit
Vodrahalli Nagesh
Workman Thomas
Huynh Andy
Schwegman Lundberg Woessner & Kluth P.A.
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