Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2011-07-19
2011-07-19
Stark, Jarrett J (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S455000, C438S125000, C257S687000, C257S668000
Reexamination Certificate
active
07981703
ABSTRACT:
The present invention provides an electronic assembly400and a method for its manufacture800, 900, 1000 1200, 1400, 1500, 1600, 1700. The assembly400uses no solder. Components406, or component packages402, 802, 804, 806with I/O leads412are placed800onto a planar substrate808. The assembly is encapsulated900with electrically insulating material908with vias420, 1002formed or drilled1000through the substrate808to the components' leads412. Then the assembly is plated1200and the encapsulation and drilling process1500repeated to build up desired layers422, 1502, 1702. Assemblies may be mated1800. Within the mated assemblies, items may be inserted including pins2202a,2202b, and2202c, mezzanine interconnection devices2204, heat spreaders2402, and combination heat spreaders and heat sinks2602. Edge card connectors2802may be attached to the mated assemblies.
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Heller III Edward P.
Occam Portfolio LLC
Stark Jarrett J
Tobergte Nicholas
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