Electromigration bonding process and system

Semiconductor device manufacturing: process – Direct application of electrical current – Fusion of semiconductor region

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Details

438468, 438107, H01L 21479, H01L 21326, H01L 2144, H01L 2148, H01L 2150

Patent

active

061566268

ABSTRACT:
A process and system for connecting a semiconductor chip to a substrate is provided. The process includes providing the substrate that is configured to receive the semiconductor chip that has a bonding pad. The substrate has a first side that is suited to be connected to the semiconductor chip and a second side that is opposite the first side. The process then includes designing a metallization bonding structure on the first side of the substrate. The metallization bonding structure has a first end, a second end, and a bend defined between the first end and the second end. Then, an oxide passivation layer is defined over the first side that includes the metallization bonding structure. A bonding via is then defined through the passivation layer. The bonding via is configured to be aligned with the bend of the metallization bonding structure. The semiconductor chip is then joined to the oxide passivation layer, such that the bonding pad is aligned with the bonding via and the bend of the metallization bonding structure. The process further includes the application of a current between the first end and the second end of the metallization bonding structure. The applied current is configured to cause a flow of electrons in an opposite direction of the current and a flow of metallization atoms in the metallization bonding structure toward the bend and into the bonding via. A reliable conductive bond between the substrate and the bonding pad of the semiconductor chip is thus established without the need for wire bonds or solder bumps.

REFERENCES:
patent: 3256598 (1966-06-01), Kramer
patent: 4534100 (1985-08-01), Lane
patent: 4549912 (1985-10-01), Anthony

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