Electromagnetic noise shielding in semiconductor packages...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S691000, C257S693000, C257S773000, C257S659000, C257S786000, C257S784000, C257S777000, C257S775000, C257S776000, C257S723000, C257S676000, C257S774000, C257S737000, C257S734000, C257S728000, C439S108000

Reexamination Certificate

active

06933599

ABSTRACT:
A semiconductor device has a die (10) overlying and electrically connected to a support structure (11), such as a substrate or a lead frame, via a plurality of interconnects. Aggressor interconnects (32, 38) are noise sources to victim interconnects (29, 59) carrying sensitive signals. An arrangement of shield interconnects (51-58) surround the victim interconnect (29, 59) in a cage-like structure to significantly block noise from the aggressor interconnect. In one form the shield interconnects are ground or power supply and the victim interconnect may be, for example, a clock signal or an RF signal. The number of shield interconnects and the number of protected victim interconnects varies depending upon design requirements. Either wire bonding or other interconnect technology (e.g. bump) is applicable.

REFERENCES:
patent: 5468999 (1995-11-01), Lin et al.
patent: 6160705 (2000-12-01), Stearns et al.
patent: 6242814 (2001-06-01), Bassett
patent: 6476506 (2002-11-01), O'Connor et al.
patent: 6538336 (2003-03-01), Secker et al.
patent: 6692272 (2004-02-01), Lemke et al.
patent: 2003/0080357 (2003-05-01), Tsai et al.

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