Electromagnetic interference suppressing device and circuit

Electricity: conductors and insulators – Anti-inductive structures – Conductor transposition

Reexamination Certificate

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C333S012000, C333S181000

Reexamination Certificate

active

06365828

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electromagnetic interference suppressing device and a circuit for suppressing electromagnetic noise arising in the periphery of a semiconductor circuit mounted on a multilayer printed circuit board.
This application is based on Japanese Patent Application No. 11-300396, the contents of which are incorporated herein by reference.
2. Description of the Related Art
In recent years, as the operating speeds of semiconductor products such as transistors, ICs, and LSIs have increased, there have been the serious problems of EMI (Electro-Magnetic Interference) which causes malfunctions in electronic devices containing the semiconductor devices or in other electronic devices.
For example, in recent personal computers, the internal clock speed of the CPU (Central Processing Unit) has increased to 650 MHz, and is expected to further increase to the order of GHz. Signal lines or power supply lines of LSIs, driven at high frequencies, contain high frequency components operating above several GHz, which regularly causes electromagnetic noise at high frequencies. Therefore, in multilayer printed circuit boards on which a number of semiconductor devices are mounted without an appropriate means for reducing the noise, the connections on the board act as antennae, and electromagnetic noise is emitted as radio waves, which may cause malfunctions in electronic devices or in other electronic devices.
EMI is mainly caused by electromagnetic radiation due to an electric current (roundabout current) which is called common mode, caused by parasitic mutual inductance or parasitic capacitance, or by a high frequency current flowing in the power supply lines. The cause of EMI is, however, complex, and there is no effective countermeasure which is applied in proximity of the sources.
A technique has been proposed for providing an electromagnetic noise absorption layer, for absorbing electromagnetic noise, on the upper and lower sides of the printed circuit board, or for providing the electromagnetic noise absorption layer as an internal layer. The technique cannot control the occurrence of the electromagnetic noise, and its effectiveness is limited. In general, a metal case, as a measure for preventing electromagnetic noise, is used to shield the entire electronic device.
In a general multilayer printed circuit board, the power source layer, the ground layer, and signal layers are layered with an intervening insulating material. In a multilayer printed circuit board shown in
FIG. 9
, an IC/LSI
803
, which is a source of a high frequency source current, is connected between a power supply line of a source layer
801
of the multilayer printed circuit board
805
, and a ground line of a ground layer
802
. A decoupling capacitor
804
is located in proximity of the IC/LSI
803
, and is connected in parallel between the source layer and the ground layer.
The decoupling capacitor
804
allows the high frequency source current, which flows through the source layer
801
depending on the switching operation of the IC/LSI
803
, to bypass the IC/LSI
803
. Further, a variation in voltage at a source terminal
803
A of the IC/LSI
803
caused by the switching operation of the IC/LSI
803
can be suppressed.
In the conventional multilayer printed circuit board
805
, the source layer
801
, which serves as the power supply line, is a planar source layer completely covering the substrate area and comprising a conductive film. The whole-area plane source layer maximizes the area through which the electric current flows, thus reducing the resistance of the power supply line, and decreases linear variations in the source voltage.
An EMI suppressing technique for a multilayer printed circuit board has been proposed in which the source layer is formed as lines to control high frequency currents (Japanese Patent Application, First Publication No. Hei 9-139573).
FIG. 10
is a plan view showing a principal part of a printed circuit board using this technique, and showing the layout of the source layer on the multilayer printed circuit board
901
. On the multilayer printed circuit board
901
shown in
FIG. 10
, the source layer (hatched area) comprises a number of branch source connections
905
with comb or zigzag shapes which branch from the main line pattern
902
which is a main conductive portion.
Circuit elements (semiconductor integrated circuits)
903
are located at the ends of the branch source lines
905
. The power is supplied to the circuit elements
903
through the main line pattern
902
and the branch source connections
905
. Decoupling capacitors
904
are provided for the respective circuit elements
903
at the power supply points and at the connection points between the main line pattern
902
and the branch source connections
905
.
The conventional example is characterized in that, because the branch source connections
905
act as inductance elements, a comparatively high inductance can be obtained in the power supply circuit for the respective circuit elements
903
. Therefore, this technique reduces the source current at high frequencies which is caused by the switching operation of one of the circuit elements
903
and which flows through the decoupling capacitors of the other circuit elements
903
, as compared with the conventional printed circuit board. Namely, the source layer of the line patterns acts as a circuit for producing impedance, and enhances the filtering effects of the decoupling capacitors.
The conventional example of the multilayer printed circuit board
805
with the whole-area plane source layer
801
causes the problem that a designer cannot adjust the high frequency source current flowing through the decoupling capacitors
804
to the source layer
801
at the time of switching the IC/LSI
803
. Because the impedance of the whole-area plane source layer
801
is low, the high frequency source current from the IC/LSI
803
flows through not only the decoupling capacitor
804
in proximity of the IC/LSI
803
but also the other decoupling capacitors
804
in proximity of the other IC/LSIC
803
. The distribution of the high frequency source current over the entire multilayer printed circuit board
805
is complicated, and is difficult to analyze. Therefore, the capacities of the decoupling capacitors
804
prepared for the respective IC/LSI
803
cannot be specified.
Further, because the source layer
801
forms the whole-area plane, the high frequency source current flows through a complicated path in the source layer
801
, and may form a large loop which causes electromagnetic noise.
FIG. 11
is a circuit diagram showing the periphery of a plurality of circuit elements connected to the decoupling capacitors. In this example, an IC/LSI
101
a
whose high frequency source current is high, an IC/LSI
101
b
whose high frequency source current is medium, and an IC/LSI
101
c
whose high frequency source current is low are connected to the power supply line and to the ground in a parallel manner. Decoupling capacitors are provided, depending on the amounts of the high frequency source currents of the IC/LSI
101
a
to
101
c
: a decoupling capacitor
102
a
whose capacity is high (impedance is low) is provided in proximity of the IC/LSI
101
a
, a decoupling capacitor
102
b
whose capacity is medium (impedance is medium) is provided in proximity of the IC/LSI
101
b
, and a decoupling capacitor
102
c
whose capacity is low (impedance is high) is provided in proximity of the IC/LSI
101
c.
As shown in the example of the multilayer printed circuit board
805
with the whole-area plane source layer
801
, if the inductances
103
a
,
103
b
, and
103
c
are not provided, the following problem may arise.
Because the impedance of the decoupling capacitor
102
c
located near the IC/LSI
101
c
is high, a part of the high frequency source current from the IC/LSI
101
c
is not released to the ground through the decoupling capacitor
102
c
, and may flow through the IC/LSI
101
a
or
101
b
, increa

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