Electromagnetic compatibility for integrated circuit pins and in

Electrical transmission or interconnection systems – Anti-induction or coupling to other systems

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Details

327551, 327311, H03B 100

Patent

active

057034168

ABSTRACT:
A circuit for providing protection from effects of electromagnetic interference (EMI) at input pins and internal nodes of an integrated circuit (IC) includes a regenerative comparator (Schmitt trigger) to perform triggering functions in response to input pulses applied to the input pin, resulting in hysteresis between high and low trigger voltages. The hysteresis extends durations of false pulses induced by presence of EMI at the input pin. A filter is coupled to the regenerative comparator, with a filter response time with a duration at least as great as the expected largest duration of EMI-induced false pulses including extended duration attributable to the hysteresis, for filtering out the EMI-induced false pulses. A pulse generator is coupled to the filter, for generating a pulse for application to the IC whenever a pulse applied to the input pin has a duration exceeding the duration of the filter time constant. The filter circuit also includes apparatus for changing a logic state of EMI-sensitive internal nodes of the IC which have relatively high RC time constants, are at a logic "1" state, and are in signal paths of the IC which determine operation of the IC, and converting the logic "1" state to a logic "0" state whenever EMI is present in the IC. The EMI-sensitive internal nodes of the IC electrically isolates the internal nodes, e.g., to inhibit them from discharging in the presence of EMI in the IC. The electrical isolation is provided by a resistor or a diode coupled between an internal node and a point of electrical ground reference. The internal nodes are EMI sensitive, each having a relatively high RC time constant for charging to a predetermined voltage level representing a logic value, located in a signal path of the IC enabled by IC circuit conditions to determine IC operation, and normally held at a logic "1" value during IC operation. When EMI detected in the IC, the logic value of the nodes is changed to logic "0".

REFERENCES:
patent: 4596939 (1986-06-01), Yamada
patent: 5113098 (1992-05-01), Teymouri
patent: 5341033 (1994-08-01), Koker
patent: 5563532 (1996-10-01), Wu et al.

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