Electrolytic method of depositing gold connectors on a printed c

Details Electrolytic method of depositing gold connectors on a printed c Electrolytic method of depositing gold connectors on a printed c

1996-02-06

1998-03-31

Powell, William

Etching a substrate: processes

Forming or treating electrical conductor article

216 18, 216 41, B44C 122

Patent

active

057334668

ABSTRACT:
Electrodepositing a metallurgy such as gold on to printed circuit board features. The methods include electrolessly depositing a copper layer over the surface of the printed circuit board. This is followed by applying a layer of photoresist atop the electroless copper, and exposing and developing the photoresist to uncover areas to be etched, leaving behind the specific features to be plated. By this expedient the remaining copper forms a commoning layer. The remaining photoresist is stripped to uncover the copper commoning layer, and a second layer of photoresist is applied atop the partially etched copper layer. This layer of photoresist is exposed and developed to uncover the features to be plated. These features are then plated with the metallurgy of choice. The photoresist is then stripped off and the electroless copper layer can remain if needed for further processing or be microetched off without harming copper traces that may exist below the electroless copper layer.

REFERENCES:
patent: 4652345 (1987-03-01), McBride et al.
patent: 5166037 (1992-11-01), Atkinson et al.
patent: 5176811 (1993-01-01), Keim et al.
Research Disclosure, Feb. 1988, #286; Internal Commoning Bar For Plating Of PC Card Tabs.
Research Disclosure, Apr. 1990, #312; Notched Commoning Bar; Jung et al.
Research Disclosure, Jan. 1990, #309; Grounding Printed Circuit Assm. With Commoning Bars, by P.M. Rogers et al.
IBM Technical Disclosure Bulletin; Selective Polymer Coating Of Dissimilar Metals; Pallady et al; vol. 13, No. 10, Mar. 1971.

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