Semiconductor device manufacturing: process – Chemical etching – Having liquid and vapor etching steps
Reexamination Certificate
2004-02-10
2004-11-23
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Having liquid and vapor etching steps
C438S618000, C438S627000, C438S628000, C438S659000, C438S677000, C438S678000, C428S209000, C428S901000, C106S001110
Reexamination Certificate
active
06821902
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an electroless-plating liquid and a semiconductor device. More particularly, this invention relates to an electroless-plating liquid useful for forming a protective film for selectively protecting surfaces of exposed interconnects of a semiconductor device which has an embedded interconnect structure formed from an electric conductor, such as copper or silver, filled in fine recesses for interconnects formed in a surface of a substrate such as a semiconductor substrate. This invention also relates to a semiconductor device in which a surface of exposed interconnects is selectively protected with a protective film.
2. Description of the Related Art
As a process for forming interconnects in a semiconductor device, a so-called “damascene process”, which comprises filling trenches for interconnects and contact holes with a metal (electric conductor), is coming into practical use. According to this process, aluminum, or more recently, a metal such as copper or silver, is embedded into trenches for interconnects and contact holes previously formed in an interlevel dielectric of a semiconductor substrate. Thereafter, an extra metal is removed by chemical mechanical polishing (CMP) so as to flatten a surface of the substrate.
In a case of interconnects formed by such a process, embedded interconnects have an exposed surface after flattening processing. When an additional embedded interconnect structure is formed on such an interconnects-exposing surface of a semiconductor substrate, the following problems may be encountered. For example, during formation of a new SiO
2
layer during a subsequent interlevel dielectric forming process, exposed surfaces of pre-formed interconnects are likely to be oxidized. Further, upon etching of the SiO
2
layer for formation of via holes, the pre-formed interconnects exposed on bottoms of the via holes can be contaminated with an etchant, a peeled resist, or the like.
In order to avoid such problems, it has been conventional to form a protective film of SiN or the like, not only on a surface region of a semiconductor substrate where interconnects are exposed, but on an entire surface of the substrate, thereby preventing contamination of exposed interconnects with an etchant, or the like.
However, provision of a protective film of SiN or the like on the entire surface of a semiconductor substrate, in a semiconductor device having an embedded interconnect structure, increases a dielectric constant of an interlevel dielectric, thus inducing interconnect delaying even when a low-resistance material such as copper or silver is employed for interconnects whereby performance of the semiconductor device may be impaired.
In view of this, it has been proposed to selectively cover surfaces of exposed interconnects to protect the interconnects with an alloy film having good adhesion to an interconnect material such as copper or silver, and also having a low resistivity (&rgr;). The alloy film, for example, is obtained by performing electroless plating.
Provision of such a protective alloy film by performing electroless plating, however, has the following problems associated with sodium hypophosphite, which is generally used as a reducing agent during electroless plating:
{circle around (1)} Inclusion of sodium in the reducing agent can cause alkali-metal contamination of the semiconductor device.
{circle around (2)} When sodium hypophosphite is used as a reducing agent, it is not possible to apply an oxidizing electric current to copper or the like. This necessitates imparting a palladium catalyst to copper or the like, thus increasing an amount of process steps and decreasing throughput.
{circle around (3)} Impartment of a palladium catalyst to copper or the like, in principle, substitutes underlying interconnects of copper or the like by palladium, and causes formation of voids in the interconnects, thus lowering reliability of the interconnects.
{circle around (4)} Since palladium diffuses into copper or the like, impartment of a palladium catalyst increases electric resistance of the interconnects.
{circle around (5)} Besides on an interconnect formed region, plated film is likely to be deposited also on an insulating film, thereby making it difficult to perform intended selective plating.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above drawbacks in the related art. It is therefore an object of the present invention to provide an electroless-plating liquid which can form a plated film (protective film) that selectively covers only surfaces of interconnects and protects exposed interconnects, without causing any alkali-metal contamination or formation of voids in the interconnects, and to provide a semiconductor device in which the exposed interconnects are selectively protected with a protective film.
In order to achieve the above object, the present invention provides an electroless-plating liquid for selectively forming a plated film on a surface of an exposed interconnect of a semiconductor device having an embedded interconnect structure, with the electroless-plating liquid comprising cobalt ions, a complexing agent, and a reducing agent free from alkali metal.
Use of the reducing agent free from alkali metal can prevent contamination of a semiconductor device with an alkali metal.
An alkylamine borane may be used as the reducing agent free from alkali metal. Use of such a reducing agent makes it possible to apply an oxidizing electric current to copper or a copper alloy, or to silver or a silver alloy, thus enabling a direct electroless plating. Further, use of an alkylamine borane, which is free from sodium, can prevent contamination of a semiconductor device with an alkali metal and, in addition, makes it possible to perform electroless plating without using a palladium catalyst.
Specific examples of the alkylamine borane include dimethylamine borane, diethylamine borane and trimethylamine borane.
The electroless-plating liquid may further contain at least one of a stabilizer selected from one or more kinds of heavy metal compounds and sulfur compounds, and a surfactant.
It is preferred that a pH of the electroless-plating liquid be adjusted to be within a range from 5 to 14 using a pH adjusting agent free from alkali metal. Use of an alkali metal-free pH adjusting agent, such as ammonia water or quaternary ammonium hydroxide, can keep the plating liquid free from sodium. The plating liquid preferably has a pH from 6 to 10.
The present invention also provides an electroless-plating liquid for selectively forming a plated film on a surface of an exposed interconnect of a semiconductor device having an embedded interconnect structure, with the electroless-plating liquid comprising cobalt ions, a complexing agent, a compound containing a refractory metal and a reducing agent free from alkali metal.
At least one of tungsten and molybdenum may be employed as the refractory metal. The reducing agent may be an alkylamine borane. By using such compounds, the electroless-plating liquid provides a protective film of a Co—W—B alloy, a Co—Mo—B alloy or a Co—Mo—W—B alloy to cover surfaces of exposed interconnects.
The present invention also provides a semiconductor device having an embedded interconnect structure of copper, copper alloy, silver or silver alloy interconnects, wherein a surface of an exposed interconnect is selectively covered with a protective film, with the protective film being formed by performing an electroless-plating process with use of an electroless-plating liquid that comprises cobalt ions, a complexing agent, and a reducing agent free from alkali metal.
By thus selectively covering surfaces of the interconnects and protecting the interconnects with the protective film of an alloy that has a high adhesion to silver or copper and has a low resistivity (&rgr;), increase in a dielectric constant of an interlevel dielectric of a semiconductor device having an embedded interconnect structure can be suppressed. Further, use of a low
Inoue Hiroaki
Matsumoto Moriji
Nakamura Kenji
Ebara Corporation
Nelms David
Tran Mai-Huong
Wenderoth , Lind & Ponack, L.L.P.
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