Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-10-18
2003-10-28
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S763000, C257S766000, C257S769000, C257S770000
Reexamination Certificate
active
06639316
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an electrode for a semiconductor device, specifically to an electrode for a semiconductor device capable of securing an ohmic contact with a semiconductor constituting a semiconductor device, realizing a superior junction state when die-bonding the semiconductor device to a submount such as a heat sink, and improving the yield in chip manufacture.
DESCRIPTION OF THE BACKGROUND
For example, a GaAs-based semiconductor laser device is generally manufactured as described below.
First, predetermined semiconductors are sequentially epitaxial-grown on a GaAs single-crystal wafer having a predetermined size serving as a substrate to form a semiconductor layer structure. Then, the layer structure is formed into a predetermined pattern, an upper electrode of the predetermined pattern is formed on the uppermost semiconductor layer, and moreover a lower electrode is formed on the back of the waver, that is, the back of the semiconductor substrate.
For these electrodes, a four-layer-structure electrode has been known so far in which an AuGeNi layer is formed on a semiconductor by the vacuum evaporation method or sputtering method, and moreover, an Au layer, an Mo layer, and an Au layer are sequentially formed on the AuGeNi layer.
After the layer structure is formed, the entire wafer is subjected to heat treatment in, for example a nitrogen atmosphere to realize an ohmic contact between the semiconductor layer and the electrode.
Then, the wafer is cleaved and formed into a state in which the desired devices are ranked as parallel bars.
Then, to protect a cleaved plane functioning as a light-emitting end face or specify current and voltage threshold values, an optical output, and a light-emitting direction, a protective film or a reflective film is formed on the cleaved plane. An InGaP film is known as a protective film and a dielectric film made of Si, SiO
x
, AlO
x
, SiN
x
, or TiO
x
is known as a reflective film.
Then, the bar is separated into an element with the desired shape and the element is formed into an element chip by using an Au—Sn foil and thereby die-boding or wire-bonding the element to a submount such as a heat sink.
In the above chip manufacturing process, an electrode formed on the surface of a semiconductor is exposed to a heating environment when obtaining an ohmic contact with a semiconductor layer, forming a protective film or a reflective film on a cleaved plane, or die-bonding or wire-bonding the electrode to submount.
Particularly, when forming the above protective film or reflective film, an electrode material is thermally changed in property because the applied temperature while the above film is formed is comparatively high or the electrode material is changed in property because it reacts with a material for forming the film in many cases.
For example, a film-forming temperature to be applied to form a protective film of InGaP on a cleaved plane is approx. 500° C. Therefore, in the case of the above four-layer-structure electrode, Ga component of the semiconductor layer violently diffuses up to the uppermost Au layer by breaking through the Mo layer and may result in Au—Ga alloy.
Moreover, when die-bonding or wire-bonding the electrode with a submount by using an Au—Son foil, the junction state between them becomes incomplete because the difference between the melting points of the Au—Sn foil and the Au—Ga alloy is too large and resultantly, the yield of chips is lowered.
Moreover, in the case of the above four-layer-structure electrode, holes may be formed on the entire surface of the electrode because low-melting-point Ge causes bumping when forming a protective film or reflective film though the above phenomenon rarely occurs. However, when the above phenomenon does occur, a source gas used to form a protective film or reflective film diffuses to the entire electrode through the holes and causes change in the properties of the electrode.
SUMMARY OF THE INVENTION
The present invention is to solve the above-described problems with an electrode for a semiconductor device and its object is to provide a new electrode for a semiconductor device which does not cause a thermal property change when forming a protective film or a reflective film is being formed and which thereby closely contacts the other material in die-bonding or wire-bonding with a submount and its manufacturing method.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
To achieve the above object, the present invention provides an electrode for a semiconductor device comprising:
a substrate electrode formed by an ohmic contact with a surface of a semiconductor, said substrate electrode constituting a layer structure on the surface of the semiconductor; and
a surface electrode formed by covering the surface and/or a side face of said substrate electrode.
Specifically, the present invention provides an electrode for a semiconductor device in which said substrate electrode is constituted of a layer structure obtained by laminating a layer made of AuGeNi, a layer made of at least one kind of material selected from a group of Mo, Cr, and W, and a layer made of at least one kind of material selected from a group of Pt and Pd in this order, and said surface electrode is constituted of a layer structure obtained by laminating a layer made of at least one kind of material selected from a group of Mo, Cr and W, and a layer made of an Au layer in this order.
Preferably, the present invention provides an electrode for a semiconductor device in which
said substrate electrode is constituted of a layer structure obtained by laminating an AuGeNi layer, an Mo layer and a Pt layer in this order, and
said surface electrode is constituted of a layer structure obtained by laminating an Mo layer and an Au layer in this order.
Moreover, the present invention provides an electrode for a semiconductor device in which
said substrate electrode is constituted of a layer structure obtained by laminating an AuGe layer, an Ni layer, and a layer made of at least one kind of material selected from a group of Mo, Cr, and W and a layer made of at least one kind of material selected from a group of Pt and Pd in this order, and
said surface electrode is constituted of a layer structure obtained by laminating a layer made of at least one kind of material selected from a group of Mo, Cr, and W and an Au layer in this order.
Preferably, the present invention provides an electrode for a semiconductor device in which
said substrate electrode is constituted of a layer structure obtained by laminating an AuGe layer, an Ni layer, an Mo layer and a Pt layer in this order, and
said surface electrode is constituted of a layer structure obtained by laminating an Mo layer and an Au layer in this order.
Moreover, the present invention provides a method of manufacturing an electrode for a semiconductor device, said method comprising steps of:
setting a semiconductor on a holder of a vacuum evaporation system or a sputtering system, covering a surface of the semiconductor with an electrode material in accordance with a vacuum evaporation method or sputtering method, thereby forming a substrate electrode of a layer structure and a surface electrode for covering the surface and/or a side face of said substrate electrode, wherein
a vacuum evaporation system or a sputtering system provided with a holder which is tilted from a set position of the electrode material and which can be rotated about an axis thereof and orbited is used to form said surface electrode.
REFERENCES:
patent: 4186410 (1980-01-01), Cho et al.
patent: 5077599 (1991-12-01), Yano et al.
patent: 5260603 (1993-11-01), Damura et al.
patent: 6333945 (2001-12-01), Abe et al.
patent: 6403987 (2002-06-01), Miki et al.
patent: 61108166 (1986-05-01), None
patent: 62020348 (1987-01-01), None
patent: 63054774 (1988-03-01), None
patent: 63156341 (1988-06-01), None
patent: 03244128 (1991-10-01), None
patent: 5-259107 (1993-10-01), None
patent: 8-255767 (1996-10-01), None
patent: 09143717 (1997-06-01), None
Nakajima Akifumi
Toyosaki Koichi
Tsukiji Naoki
Loke Steven
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
The Furukawa Electric Co. Ltd.
Vu Hung Kim
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