Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1997-02-19
2000-05-23
Tran, Minh Loan
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257750, 257758, H01L 2348, H01L 2352, H01L 2940
Patent
active
060668911
ABSTRACT:
The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film 11, a titanium layer 12, a titanium nitride layer 13 that serves as the barrier layer, an aluminum alloy wiring layer 15 and a protective film 18 are formed on top of the silicon substrate 10 to compose the electrode structure. In this case, a distortion relaxation layer 14, with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer 13 and the aluminum alloy wiring layer 15. Because of this distortion relaxation layer, for every wiring width of 1 .mu.m, the number of Al voids with widths of over 0.3 .mu.m is practically reduced to 0.
REFERENCES:
patent: 4141022 (1979-02-01), Sigg et al.
patent: 4887146 (1989-12-01), Hinode
patent: 4989064 (1991-01-01), Kubokoya et al.
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5202579 (1993-04-01), Fujii et al.
patent: 5236869 (1993-08-01), Takagi et al.
patent: 5345108 (1994-09-01), Kikkawa
patent: 5427666 (1995-06-01), Mueller et al.
patent: 5459353 (1995-10-01), Kanazawa
patent: 5589713 (1996-12-01), Lee et al.
Proceedings of the European Solid State Device Research Conference (ESSDERC), Leuven, Sep. 14-17, 1992, No. Conf. 22, Sep. 14, 1992, Maes H E; Mertens R P; Van Overstraeten R J, pp. 371-374, XP000357114 Wendt H: "Process Integration for Barrier Layers and Al-Alloys Using a Sputtering Cluster Tool".
Patent Abstracts of Japan vol. 12, No. 402 (E-673), Oct. 25, 1988 & JP 63 142832 A (Fujitsu Ltd), Jun. 15, 1988.
IBM Technical Disclosure Bulletin, vol. 25, No. 12, May 1983, New York US, pp. 6398-6399, XP002029264 C.Y. Ting: "New structure for contact metallurgy".
Japanese Journal of Applied Physics, vol. 31, No. 5A, May 1, 1992. pp. 1446-1452, XP000355399 Ping Jin et al: "Bais Effect on the Microstructure and Diffusion Barrier Capability of Sputtered Tin and Tioxny Films".
Koubuchi, et al: "Effects of Si on electromigration of Al-CuSi/Tin layered metallization", J. Voc. Sci. Technol.B vol. 10, No. 1, Jan/Feb 1992, pp. 143-148.
Kikkawa: "A Quarter-Micrometer Interconnection Technology Using a Tin/Al-Si-Cu/Tin/Al-Si-Cu/Tin/Ti Multilayer Structure" IEEE Transactions on Electron Devices, vol. 40 No. 2, Feb. 1993, pp. 296-302.
Mandi et al: "Diffusion barrier properties on Ti/Tin investigated by transmission electron microscopy", J. App. Phys. 66 (5), Sep. 1, 1990, pp. 2127-2132.
Soube, et al: "Metastable Phase Formation in Al alloy/Tin/Ti/Si System", First International Symposium on Control of Semiconductor Interfaces, Nov. 11, 1993.
Pramanik, et al: "Barrier Metal for ULSI--its Manufacturing Process and Reliability", Solid State Technology, (Japanese edition), Jul. 1991, pp. 23-28.
Isobe Yoshihiko
Komura Atsushi
Yamane Hiroyuki
Yamaoka Tooru
Yamauchi Takeshi
Nguyen Cuong Quang
Nippondenso Co., Ltd
Tran Minh Loan
LandOfFree
Electrode for semiconductor device including an alloy wiring lay does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrode for semiconductor device including an alloy wiring lay, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrode for semiconductor device including an alloy wiring lay will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1839017