Electrode for semiconductor device and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S750000, C257S751000

Reexamination Certificate

active

06348735

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority of the prior Japanese Patent applications No. 6-90926 filed on Apr. 28, 1994 and No. 6-146289 filed on Jun. 28, 1994, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wiring electrode for semiconductors and a manufacturing method thereof. Particularly, the present invention relates to a metal system of an electrode which has an aluminum alloy wiring layer (hereinafter, referred as an Al alloy layer) and can reduce the defects (called Al void) that occur within Al alloy layers due to the miniaturization.
2. Related Arts
In recent years, with advancement in technology for integrating elements, technologies for miniaturization and multilayering have become essential. As miniaturization advances, the need to design finer widths for the wiring in the Al alloy layer arises. But, as shown in
FIG. 4
, as the wire widths become finer than 2 &mgr;m or 3 &mgr;m, especially less than 1 &mgr;m, Al voids are known to occur inside the Al alloy layer. Such Al voids are generated as a stress migration due to the tensile stress which occurs inside the Al alloy layer during heat treatment. Also, the Al voids occur when various thin films are multilayered because such multilayered structure causes tensile stress inside the element.
If these Al voids become significantly large, the reliability factor becomes a big problem. For example, the following problems may occur: disconnection of the Al alloy wiring; increase in the wiring resistance due to the reduction in the cross section of the Al alloy layer; destruction of the elements due to heat generation; delays in the operation speed; electromigration due to the application of large current and the like.
One conventional method that has been used to reduce the occurrences of Al void, is to mix copper in the aluminum and silicon (Al—Si) wiring electrode to form the Al—Si—Cu wiring, wherein the copper acts to hinder the movement of the Al atoms.
Such wiring electrode is disclosed in JP-A-63-152147. The publication discloses that, if the crystal surface of the Al—S—Cu wiring is oriented at the (111) plane, the occurrence of Al voids is further reduced. In other words, as the (111) plane is filled most densely with Al atoms, the movement of an Al atom is restrained by the other Al atoms, or movement of the Al atoms for easing the tensile stress inside the Al alloy layer is restrained, which leads to fewer occurrences of Al voids.
However, the (111) plane orientation of the Al—Si—Cu wiring has a close relation to the underlying crystal structure. For example, as disclosed in JP-B-3-3395, JP-A-4-42537 and JP-A-3-262127, it has been discovered that it is difficult to properly orient the crystal surface of the Al alloy when a metallic nitride film of high melting point, like a titanium nitride (TiN) layer, is interposed under the Al alloy layer as a barrier metal.
Thus, for the wiring electrode disclosed in JP-A-63-152147, the underlying crystal structure needs to be supervised carefully to improve the orientation of the Al—Si—Cu wiring, and because of this, improvements in productivity cannot be expected.
SUMMARY OF THE INVENTION
The present invention, which has been done in consideration with the above problem, aims to provide an electrode structure that can curb the occurrences of Al voids inside Al alloy layers, irrespective of the orientation of an Al alloy layer which is located over a titanium nitride layer.
To achieve the above objective, the inventors of the present invention have investigated, based on the manufacturing conditions and the like, methods which can curb the occurrences of Al voids in Al alloy layers irrespective of their orientation. From these investigations, it was discovered that the layer formation conditions of the titanium nitride layer, which was assumed to have no relation whatsoever with the occurrence of the Al voids, can drastically reduce the occurrences of Al voids.
The present invention is based on the information gathered by the inventors from the results of their investigations and an electrode structure according to the invention has the following characteristics: it is constructed on a semiconductor substrate, with an interlayer insulator film which has an aperture corresponding to a contact area of the substrate; a barrier layer, whose composition includes titanium nitride, contacts the semiconductor substrate via the aperture of the interlayer insulator film; an aluminum alloy wiring layer is formed over the barrier layer; and a distortion relaxation layer is formed between the barrier layer and the aluminum alloy wiring layer with a film that has a thickness of over 10 nm and made up of an intermetallic compound, whose composition includes at least aluminum and titanium.
By placing the distortion relaxation layer with a thick film (10 nm or more), the distortion, acting inside the aluminum alloy wiring layer, is eased and thus, irrespective of the orientation of the aluminum alloy wiring layer, occurrences of Al voids inside the Al alloy wiring layer can be suppressed.
Or, it may be that the present invention has the following features: for every 1 &mgr;m of the line width of the aluminum alloy wiring layer, the thickness of the distortion relaxation layer, which is an intermetallic compound including aluminum and titanium and which is to be placed between the barrier layer and the aluminum alloy wiring layer, is set so that the Al voids, the width of which is over 0.3 &mgr;m, can be effectively made zero. In other words, the distortion relaxation layer preferably has a thickness which can suppress the occurrence of the Al void the width of which is approximately one third or more of the line width of the aluminum alloy wiring layer. Such film thickness according to the present invention, which was unachievable in the reactant layer formed through the reaction of the titanium nitride and aluminum alloy wiring layers when the conventional method is performed, make it possible to enable the drastic reduction of Al voids.
In addition, it is desirable that the distortion relaxation layer be formed to cover at least 40% of the interface between the barrier layer and the aluminum alloy layer.
Moreover, the distortion relaxation layer can either be a Al
3
Ti layer or an intermetallic compound that contains Al
3
Ti. Ti contained in the titanium nitride layer can enter between the aluminum lattices and constitute the distortion relaxation layer of Al
3
Ti or an intermetallic compound containing Al
3
Ti, the distortion due to the tensile stress that occurs inside the aluminum alloy wiring layer is eased. Consequently, irrespective of the orientation of the aluminum alloy wiring layer, the occurrences of Al voids inside Al alloy layer can be suppressed.
Furthermore, it is desirable that the oxygen levels at the inside of the barrier layers and at the interface of the barrier layer and the distortion relaxation layer be under 1 at %. Because of such, it would be easier for aluminum (Al) and titanium (Ti) to react to each other.
Moreover, by providing an alloy spike preventive layer between the barrier layer and the semiconductor substrate, the occurrences of Al voids can be curbed while at the same time suppressing the occurrence of alloy spikes. For this case, the first titanium nitride layer is positioned as the barrier layer and a second titanium nitride layer, with different matter properties from the first one, is placed as the alloy spike preventive layer. With this kind of structure, titanium nitride layers made of the same material can be used to suppress the occurrences of both Al voids and alloy spikes at the same time.
Next, a manufacturing method according to the present invention, for making a wiring electrode basically has the following steps: a step of forming an interlayer insulator film on a semiconductor substrate; a step of forming an opening on the interlayer insulator film which exposes the surface

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