Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2000-08-23
2001-08-21
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C345S063000
Reexamination Certificate
active
06278243
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display apparatus, and more particularly, to a surface discharge type triode plasma display apparatus.
2. Description of the Related Art
FIG. 1
shows the structure of a panel of a surface discharge type triode plasma display apparatus.
FIG. 2
shows an electrode line pattern of the plasma display panel shown in FIG.
1
.
FIG. 3
shows another view of one pixel in the plasma display panel of FIG.
1
. Referring to the drawings, address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
, dielectric layers
11
and
15
, Y-electrode lines Y
1
, . . . , and Y
n
, X-electrode lines X
1
, . . . , and X
n
, phosphors
16
, partition walls
17
, and a magnesium oxide (MgO) layer
12
as a protective layer are provided between front and rear glass substrates
10
and
13
of a general surface discharge plasma display panel
1
.
The address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
are formed on the front surface of the rear glass substrate
13
in a predetermined pattern. A lower dielectric layer
15
is deposited on the entire front surfaces of the address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
. The partition walls
17
are formed on the front surface of the lower dielectric layer
15
perpendicular to the address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
. These partition walls
17
define the discharge areas of pixels and serve to prevent cross talk between pixels. Each phosphor
16
is deposited between partition walls
17
.
The X-electrode lines X
1
, . . . , and X
n
and the Y-electrode lines Y
1
, . . . , and Y
n
are formed on the rear surface of the front glass substrate
10
in a predetermined pattern to be perpendicular to the address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
. The respective intersections define pixels. Each of the X-electrode lines X
1
, . . . , and X
n
is composed of a transparent conductive indium tin oxide (ITO) electrode line X
na
(
FIG. 3
) and a metal bus electrode line X
nb
(FIG.
3
). Each of the Y-electrode lines Y
1
, . . . , and Y
n
is composed of an ITO electrode line Y
na
(
FIG. 3
) and a metal bus electrode line Y
nb
(FIG.
3
). The upper dielectric layer
11
is deposited on the entire rear surfaces of the X-electrode lines X
1
, . . . , and X
n
and the Y-electrode lines Y
1
, . . . , and Y
n
. The MgO layer
12
for protecting the panel
1
against a strong electrical field is deposited on the entire surface of the upper dielectric layer
11
. A gas for forming plasma is hermetically sealed in a discharge space
14
.
A driving method fundamentally adopted for such a plasma display panel as described above is to sequentially perform a reset step, an address step and a sustain-discharge step in a unit sub-field. In the reset step, residual wall charges in the previous sub-field are removed, and space charges are uniformly generated. In the address step, wall charges are produced at selected pixels. In the sustain-discharge step, light is emitted from pixels at which the wall charges are formed in the address step. In other words, when an alternating current (AC) pulse of a relatively high voltage is applied between the X-electrode lines X
1
, . . . , and X
n
and the Y-electrode lines Y
1
, . . . , and Y
n
, surface discharges occur at the pixels at which the wall charges are formed. At this time, a plasma is formed in a gas layer, and the phosphors
16
are excited due to irradiation by ultraviolet rays from the plasma, thereby generating light.
In such a plasma display apparatus, conventionally, a single Y-driver applies a driving signal to only one end of each of the Y-electrode lines Y
1
through Y
n
.
FIG. 4
illustrates a conventional triode surface discharge plasma display apparatus. Referring to
FIG. 4
, the conventional triode surface discharge plasma display apparatus includes a display panel
2
, a controller
21
, an address driver
22
, a Y-driver
231
and
232
and an X-common driver
24
. The controller
21
includes a display data controller
211
and a drive controller
212
. The display data controller
211
includes a frame memory
201
, and the drive controller
212
includes a scan controller
202
and a common controller
203
. The Y-driver
231
and
232
includes a scan driver
231
and a Y-common driver
232
.
The controller
21
receives a clock signal CLK, a data signal DATA, a vertical synchronizing signal V
SYNC
and a horizontal synchronizing signal H
SYNC
from a host, for example, a notebook computer. The display data controller
211
stores the data signal DATA in the internal frame memory
201
in response to the clock signal CLK, and applies a corresponding address control signal to the address driver
22
. The drive controller
212
including the scan controller
202
and the common controller
203
processes the vertical synchronizing signal V
SYNC
and the horizontal synchronizing signal H
SYNC
. The scan controller
202
generates signals for controlling the scan driver
231
, and the common controller
203
generates signals for controlling the Y-common driver
232
and the X-common driver
24
.
The address driver
22
processes the address control signal from the display data controller
211
and applies corresponding display data signals to the address electrode lines A
1
, A
2
, . . . , and A
m
of the display panel
2
in an address step. The scan driver
231
of the Y-driver
231
and
232
applies a corresponding scan drive signal to each Y-electrode line Y
1
, Y
2
, . . . , or Y
n
in response to a control signal from the scan controller
202
in the address step. The Y-common driver
232
of the Y-driver
231
and
232
simultaneously applies a common drive signal to each of the Y-electrode lines Y
1
through Y
n
, in response to a control signal from the common controller
203
in a sustain-discharge step. The X-common driver
24
simultaneously applies a common drive signal to each of the X-electrode lines X
1
through X
n
in response to a control signal from the common controller
203
in the sustain-discharge step.
As described above, a conventional surface discharge plasma display apparatus is designed such that the single Y-driver
231
and
232
applies a drive signal to the one end of each Y-electrode line Y
1
, Y
2
, . . . , or Y
n
. In relation to this fact, a problem of such a conventional surface discharge plasma display apparatus will be described below with reference to FIG.
5
.
FIG. 5
illustrates the operation of the plasma display apparatus of
FIG. 4
in an address step. In
FIG. 5
, reference characters C
11
through C
nm
indicate pixels corresponding to the intersections of address electrode lines A
1
through A
m
and display electrode lines Y
1
through Y
n
and X
1
through X
n
. Reference characters R
1
through R
m
indicate resistance values in unit areas of each Y-electrode line Y
1
, Y
2
, . . . , or Y
n
.
Referring to
FIG. 5
, the left terminal of each Y-electrode line Y
1
, Y
2
, . . . , or Y
n
in the plasma display panel
2
is connected to a corresponding output terminal in the scan driver
231
. Each output terminal of the scan driver
231
is connected to one of upper totem-pole transistors UTP
1
, through UTP
n
and one of lower totem-pole transistors LTP
1
, through LTP
n
. In the address driving step performed in a unit sub-field, the address driver
22
simultaneously applies display data signals corresponding to a scanned Y-electrode line (one of the Y-electrode lines Y
1
. through Y
n
) to all the address electrode lines A
1
, through A
m
. Here, a positive voltage higher than a ground voltage is applied to address electrode lines corresponding to pixels to be displayed, and a ground voltage is applied to address electrode lines corresponding to pixels not to be displayed.
In the address driving step performed in a unit sub-field, a lower totem-pole transistor connected to a output terminal of the scan driver
231
, which is connected to a scanned Y-electrode line, is turned
Leydig , Voit & Mayer, Ltd.
Samsung SDI & Co., Ltd.
Tran Thuy Vinh
Wong Don
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