Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1997-05-09
2000-06-20
Jackson, Stephen W.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 911, 361111, 361118, H02H 900
Patent
active
060784873
ABSTRACT:
A circuit which protects an integrated circuit (IC) device from damage due to electrostatic discharge (ESD). The protection circuit includes an N-channel metal oxide semiconductor field effect transistor (MOSFET) clamping device and a gate modulation circuit. The source and drain of the MOSFET clamp are connected between an input/output (I/O) pad of the IC and a ground reference voltage. During normal operation of the IC, the gate modulation circuit disables the MOSFET clamp by connecting its gate terminal to a ground reference voltage. This permits signal voltages to pass between the I/O pad and any operating circuits connected to the pad. During an ESD event, the gate modulation circuit connects the gate to the I/O pad, which enables the MOSFET clamp, causing any ESD voltages and resulting currents to be shunted through the MOSFET clamp to ground. As a result, the ESD clamp reaches its clamped-to snapback voltage via an increase in MOSFET channel current, and not via junction breakdown. This insures that the ESD clamp reaches its snapback voltage before the onset of junction breakdown in the operating circuits. The circuit is especially useful in integrated circuits where the gate oxide of a standard ESD clamp transistor is too thin to protect the operating logic from I/O signal voltages that are greater than the supply voltage used for the operating logic circuits.
REFERENCES:
patent: 4859875 (1989-08-01), Tihanyi et al.
patent: 5208719 (1993-05-01), Wei
patent: 5237395 (1993-08-01), Lee
"Dynamic Gate Coupling of NMOS for Efficient Output ESD Protection" Charvaka Duvvury and Carlos Diaz, Mar. 31, Apr. 1-2, 1992, Institute of Electrical and Electronics Engineers, Inc., pp. 141-150.
Krakauer David B.
McGee William A.
Mistry Kaizad R.
Partovi Hamid
Digital Equipment Corporation
Jackson Stephen W.
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