Electro-static discharge protection circuit

Details Electro-static discharge protection circuit Electro-static discharge protection circuit

2005-11-15

2005-11-15

Leja, Ronald (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

Reexamination Certificate

active

06965503

ABSTRACT:
An ESD protection circuit including the following: one or more inverters (I1, I2, I3), each of the one or more inverters having an input and an output; an RC network (11) having an output node (RCT), output node (RCT) connected with the input of at least one of said one or more inverters; a clamping device (N3) joined with the output of at least one of one or more inverters (I1, I2, I3); and a feedback device (NKP) in communication with clamping device (N3) and output node (RCT) of RC network (11). An RC network may include one or more resistors, and one or more decoupling capacitors. In one embodiment, feedback device (NKP) is an NFET and each of one or more inverters (I1, I2, I3) includes a PFET and NFET pair (P0/N0, P1/N1, P2/N2).

REFERENCES:
patent: 5559659 (1996-09-01), Strauss
patent: 6434061 (2002-08-01), Huber
patent: 6552886 (2003-04-01), Wu et al.

Affiliated with

Also associated with

Rating

Electro-static discharge protection circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electro-static discharge protection circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electro-static discharge protection circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3521962