Electro optical devices with reduced filter thinning on the...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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C438S081000, C438S070000, C438S075000, C438S462000

Reexamination Certificate

active

06255133

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electro optical devices with a reduced filter thinning on the edge or outer pixel photosites and a method for reducing the thinning of filter layers on the pixel photosites closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner.
BACKGROUND OF THE INVENTION
Image sensors for scanning document images, such as charge coupled devices (CCDs), typically have a row or linear array of photosites together with suitable supporting circuitry integrated onto a semiconductor chip. Usually, a sensor is used to scan line by line across the width of a document with the document being moved or stepped lengthwise in synchronism therewith. A typical architecture for such a sensor array is given, for example, in U.S. Pat. No. 5,153,421.
In a full-page-width image scanner, there is provided a linear array of photosensors which extends the full width of an original document, such as eleven inches. When the original document moves past the linear array, each of the photosensors converts reflected light from the original image into electrical signals. The motion of the original image perpendicular to the linear array causes a sequence of signals to be output from each photosensor, which can be converted into digital data.
A currently-preferred design for creating such a long linear array of photosensors is to provide a set of relatively small semiconductor chips, each semiconductor chip defining thereon a linear array of photosensors along with ancillary circuit devices. These chips are assembled end-to-end to form a single linear array of photosensors as disclosed in U.S. Pat. No. 5,473,513. However, a single chip having a linear array may also be used for sensing images and converting those images into electrical signals to be output from each photosensor, which can be converted into a digital signal. These chips can also be assembled end to end to form a full width array comprising a multiple parallel linear arrays of photosites.
With the gradual introduction of color-capable products into the office equipment market, it has become desirable to provide scanning systems which are capable of converting light from full-color images into separate trains of image signals, each train representing one primary color. In order to obtain the separate signals relating to color separations in a full-color image, one technique is to provide on a semiconductor chip multiple parallel linear arrays of photosensors, each of the parallel arrays being sensitive to one primary color. Typically, this arrangement can be achieved by providing multiple linear arrays of photosensors which are physically identical except for a translucent primary-color overlay over the photosensitive areas, or “photosites,” for that linear array. In other words, the linear array which is supposed to be sensitive to red light only will have a translucent red layer placed on the photosites thereof, and such would be the case for a blue-sensitive array and a green-sensitive array. As the chip is exposed to an original full-color image, only those portions of the image which correspond to particular primary colors wil reach those photosensors assigned to the primary color.
The most common substances for providing these translucent filter layers over the photosites is polyimide or acrylic. For example, polyimide is typically applied in liquid form to a batch of photosensor chips while the chips are still in undiced, wafer form. After the polyimide liquid is applied to the wafer, the wafer is centrifuged to provide an even layer of a particular polyimide. In order to obtain the polyimide having the desired primary-color-filtering properties, it is well known to dope the polyimide with either a pigment or dye of the desired color, and these dopants are readily commercially available. When it is desired to place different kinds of color filters on a single chip, a typical technique is to first apply an even layer of polyimide over the entire main surface of the chip (while the chip is still part of the wafer) and then remove the unnecessary parts of the filter by photo-etching or another well known technique. Typically, all of the filter layer placed over the chip is removed except for those areas over the desired set of photosites. Acrylic is applied to the wafer in a similar manner.
SUMMARY OF THE INVENTION
According to a first embodiment of the present invention, a semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer deposited over the main surface and dams exclusive of the bonding pads. A first primary color filter layer is deposited over at least first inner photosite and first outer photosite, wherein the first primary color filter layer transmits a primary color. A second primary color filter layer is deposited over at least a second inner photosite and a second outer photosite, wherein the second primary color filter layer transmits a second primary color. A third primary color filter layer is deposited over at least a third inner photosite and a third outer photosite, wherein the third primary color filter layer transmits a third primary color. The dams consist of aluminum, polyimide or acrylic, and the filter layers and the clear layer consist of polyimide or acrylic.
According to a second embodiment, a semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads, and wherein a clear layer is deposited on the main surface exclusive of the bonding pads. A plurality of dams are placed on the clear layer on the main surface in the tab regions, and a first primary color filter layer is deposited over at least first inner photosite and first outer photosite. The first primary color filter layer transmits a primary color. A second primary color filter layer is deposited over at least a second inner photosite and a second outer photosite, wherein the second primary color filter layer transmits a second primary color. A third primary color filter layer is deposited over at least a third inner photosite and a third outer photosite, wherein the third primary color filter layer transmits a third primary color. The dams consist of aluminum, polyimide or acrylic, and the filter layers and the clear layer consist of polyimide or acrylic.
A method for fabricating the photosensitive chips of the first embodiment comprises providing a semiconductor wafer having a main surface defining chip areas separated by V-grooves, the chip areas defining bonding pads and three rows of photosites, wherein the photosites include inner photosites, outer photosites and bonding pads; depositing dams in tab regions on the semiconductor wafer; hard baking the semiconductor wafer; depositing a clear layer on the semiconductor wafer; soft baking the semiconductor wafer; exposing selective areas of a semiconductor wafer; etching the clear layer covering the bonding pads from the semiconductor wafer; hard baking the semiconductor wafer; and depositing a first primary color filter layer over at least first inner photosite and first outer photosite, the first primary color filter transmitting a primary color. The method for fabricating the semiconductor chip further includes dicing the semiconductor wafer to produce the semiconductor chip for single chip applications or for assembly on a substrate to provide a full width array.
A method for fabricating the photosensitive chips of the second embodiment comprising providing a semiconductor wafer having a main surface defining chip areas separated by V-grooves, the chip areas defining bonding pads and three rows of photosites, wherein the photosites include inner photosites, outer photosites and bonding pa

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