Electro-optical device substrate, active matrix substrate...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reexamination Certificate

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Details

C345S096000, C345S097000, C345S098000, C345S099000, C345S100000

Reexamination Certificate

active

06670953

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electro-optical device substrates, active matrix substrates, and methods for inspecting the electro-optical device substrates.
2. Description of Related Art
Hitherto, liquid crystal display devices formed by a pair of substrates holding a liquid crystal therebetween have been known. Concerning these liquid crystal display devices, a display device in which an active matrix substrate is used as one of the pair of substrates has been put to practical use. Regarding the active matrix substrate, a plurality of data lines and a plurality of gate lines, the gate lines intersecting the data lines at right angles, are formed on a glass sheet or the like. A pixel electrode is formed in accordance with the intersection of each data line and each gate line. Each pixel electrode is connected via a thin-film transistor to each data line and each gate line.
The number of gate lines and data lines to be formed corresponds to the number of display pixels. For example, concerning a color liquid crystal display device, one type with 480 gate lines and 640×3 (corresponding to the RGB colors) data lines and another type with 1024 gate lines and 1280×3 data lines are known. Since it is necessary to form a large number of wires on the active matrix substrate, defective data lines and gate lines, such as broken or narrowed lines (portion where the wire is narrower than the other portions), are not permitted.
In reality, however, it is impossible to prevent wire defects from occurring at a certain rate in manufacturing processes of active matrix substrates due to various causes. Hence, there is a demand for positive detection of an active matrix substrate having a defective gate line or a defective data line and for accurate determination of the location of a breakage so as to prevent a defect, i.e., the breakage, which arises from the same cause, from recurring.
To this end, a breakage inspection method is disclosed in Japanese Unexamined Utility Model Publication No. 63-70596.
In this breakage inspection method, concerning a plurality of gate lines formed in a stripe arrangement on a substrate, adjacent gate lines (or data lines) are connected at ends thereof. Specifically, a first gate line and a second gate line are connected at left ends thereof, the second gate line and a third gate line are connected at right ends thereof, the third gate line and a fourth gate line are connected at left ends thereof, the fourth gate line and a fifth gate line are connected at right ends thereof, and so forth. With this arrangement, a single wire is formed by series connection of gate lines. By detecting whether a predetermined current flows through this wire, it is determined whether any defective gate line is present.
This breakage inspection method can inspect whether there is any defective gate line, but fails to inspect the specific location of a defective gate line. Therefore, with this inspection method, it fails to determine the location of a broken gate line and to pursue or infer by analogy a cause that has given rise to the defect. Hence, the inspection method has a drawback in that it is impossible to take effective steps to prevent breakages from recurring.
In the above breakage inspection method, the presence of a defect can be determined by allowing a predetermined current i to pass through the series connected wire and measuring a potential difference across both ends of the wire. Specifically, a voltage when no defect is present in any part of the wire is measured beforehand. This voltage is expressed by iNRL where RL represents a resistance value per line in the wire (such as the gate lines) and N represents the total number (such as the total number of the gate lines) of the wire.
Next, the potential difference across both ends of the wire to be inspected is measured. When a defect is present in any part of the wire, the measured voltage is expressed by i(RB+NRL) where RB represents a resistance value at the location of a defect, such as the narrowed portion or the like. Then, a difference between these voltages, that is, iNRL−i(RB+NRL), is obtained. When the resultant detected voltage is smaller than the predetermined value, it is determined that some portion of the wire is broken.
With this method, the voltage computed from the above equation is ≈0 when NRL>>RB. It is therefore impossible to perform defect detection. Specifically, the above method has a drawback in that, when the number of wires is great (that is, when the resistance NRL is great) or when the wire is narrowed but not completely broken (that is, when the resistance RB is relatively small under a condition where the wire is partially narrowed), it is difficult to perform defect detection.
In order to eliminate the above drawbacks, a method described hereinafter has been proposed to detect breakages or narrowed portions. This method is described with reference to FIG.
6
. In an active matrix substrate S
2
shown in
FIG. 6
, for example, a Y shift register
31
, operating as a gate electrode drive circuit, and a buffer stage
33
are provided at left ends of gate lines (G
1
to G
6
). A Y shift register
32
and a buffer stage
34
are provided at right ends.
In this inspection method, output levels of final stages of the buffer stage
34
on the side of the Y shift register
32
are set at a low level, and a selection pulse is input to the Y shift register
31
. Specifically, output signals from final-stage inverters of the buffer stage
33
on the side of the Y shift register
31
are switched one after another from a low level to a high level. As a result, currents i
1
, i
2
, . . . i
6
flow through the gate lines G
1
, G
2
, . . . G
6
in order. By measuring each current value in the vicinity of the buffer stage
34
, the method inspects the gate lines one by one for the presence of breakages.
If each of the current values of the currents i
1
, i
2
, . . . i
6
is not smaller than a predetermined value, it is determined that no gate line is broken. In contrast, when the measured current value is not greater than the predetermined value, it is determined that the gate line is somehow defective.
When the Y shift registers
31
and
32
and the like are formed with polysilicon prepared by a low-temperature process having a maximum process temperature of about 400 to 600° C., it is known that there is a high risk that the Y shift registers
31
and
32
experience electro-static damage and malfunctioning is thereby caused. Furthermore, defective patterning may be caused due to an effect of particles and the like, thus causing malfunctioning in the Y shift registers
31
and
32
.
Hence, when at least one of the Y shift registers
31
and
32
is defective and all of the buffer stages
33
and
34
are set at a high level, no current can pass through the gate lines (G
1
to G
6
) by serially selecting the gate lines using the above breakage inspection method. Therefore, there is a fear of being unable to always perform breakage inspection in a stable manner using the above breakage inspection method.
In addition, in the above breakage inspection method, a large number of wires must be selected one after another for detecting the presence of breaks. Thus, the method has a drawback in that it requires a long period of time for inspection.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an electro-optical device substrate, an active matrix substrate, and a method for inspecting the electro-optical device substrate for quickly and accurately specifying the location of a defect and for always performing defect inspection in a stable manner.
To this end, according to one aspect of the present invention, there is provided an electro-optical device substrate including a plurality of wires, a plurality of switching devices, and a power-supply means. The switching devices are interposed between each of the adjacent wires. Each of the switching devices belongs to a first g

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