Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2011-04-19
2011-04-19
Lefkowitz, Sumati (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S204000, C345S030000
Reexamination Certificate
active
07928941
ABSTRACT:
It is possible to suppress the voltage amplitudes of data lines and to prevent deterioration in display quality by a simple configuration.Each of pixels110includes a pixel capacitor and a storage capacitor of which one end is connected to a pixel electrode and the other end is connected to each capacitive line132. If first, second, third, . . . , 320th, and 321stscanning lines112are sequentially selected, the capacitive line132of each row is provided with TFTs152, 154, 156and158. A source electrode of the TFT156of a first row is connected to a first feed line165and a gate electrode thereof is connected to a first scanning line112. A source electrode of the TFT158is connected to a second feed line167and a gate electrode thereof is connected to a common drain electrode of the TFTs152and154. The drain electrodes of the TFT156and158are connected to the first capacitive line132. A gate electrode of the TFT152is connected to a second scanning line112.
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Yamazaki Katsunori
Yamazaki Yasushi
Hernandez Jesus
K&L Gates LLP
Lefkowitz Sumati
Sony Corporation
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