Seal for a joint or juncture – Process of static sealing
Reexamination Certificate
1999-08-31
2002-05-21
Knight, Anthony (Department: 3626)
Seal for a joint or juncture
Process of static sealing
C277S628000, C277S915000, C277S919000, C165S080300, C257S719000, C361S704000
Reexamination Certificate
active
06390475
ABSTRACT:
FIELD
The invention relates to a method and assembly for utilizing a gasket to protect an exposed die from damage, such as fracturing, chipping and cracking, caused by external forces such as shock, vibrations, installation and/or handling, and to suppress electromagnetic interference emissions from the exposed die.
BACKGROUND
When assembling an electronic package or integrated circuit (IC) device which includes an exposed die having electrical circuits, one approach to cooling is when a heat sink is “die referenced”, that is, placed directly upon the surface of the exposed die. However, although the heat sink is provided for thermal protection of the die, the placement of the heat sink on the die can result in physical damage to the die, and consequently a deterioration in the performance of the circuit device.
Therefore, unless the heat sink is placed carefully and squarely upon the die, the heat sink can tilt on the surface of the die, thus rendering the die vulnerable to chipping and/or cracking on the corner thereof. Such damage to the die can also occur when the heat sink itself is installed during assembly, and when the die is not coplanar with the top surface of the die.
FIG. 2
shows an example of improper placement of a heat sink on an exposed die. When the heat sink
50
is placed upon the exposed die
10
(mounted on a substrate
20
) at an angle as depicted in the drawing, the heat sink
50
tilts on the surface of the exposed die
10
, thus fracturing, chipping or cracking the corner of the die.
FIG. 3A
shows an example of a chipped corner of an exposed die, whereby chips of silicon are forcefully broken off when the heat sink is placed upon the exposed die in an uneven manner. As set forth above, such fracturing often occurs in the corner of the die. However, the die is equally vulnerable to scratching and chipping on the top surface thereof as well. Furthermore, such fracturing can be caused by shock and vibrations applied to the apparatus or housing of the electronics package which includes the exposed die. The standard for ensuring proper implementation of the exposed die, and therefore ensuring proper functionality of the corresponding circuit device, requires that fractures, chips, scratches and other forms of damage must be less than a testing standard which can include, but not be limited to, 5 mils.
FIG. 3B
shows a properly protected die in which only pre-existing weak spots are shown, typically less than 5 mils. Conversely,
FIG. 4
shows a die subjected to shock and vibration testing having unacceptable levels of fracturing, chipping and cracking, measuring up to 6 mils×9 mils.
Shock and vibration testing of electronic and electro-mechanical devices having circuit boards therein was conducted to simulate the environments in which such devices are utilized, including automobiles, aircrafts, etc. The results of such testing are shown in Table A.
TABLE A
Configurations
Interface
Gasket
Max. Crack Size
T210-A0
Bare
25
mils
T443
Bare
32
mils
T710
Bare
10
mils
T443
APM gasket
3.5
mils
T710
APM gasket
2.5
mils
T443
APM gasket
14
mils
T710
APM gasket
<2.5
mil
T443
Chomerics gasket
<1
mil
The results of “bare” testing, in which the exposed die has a heat sink applied thereon, utilizing any of interface materials including the Thermagon Corp. (Cleveland, Ohio) T210-A0, the Chomerics Corp. (Woburn, Mass.) T443 the Chomerics Corp. T710, are shown in the first three rows of results in Table A. The results of “bare” testing show unacceptable levels of cracking and other damage of no less than 10 mils. As set forth above, 5 mils is the maximum allowable amount of damage, including fracturing, chipping, cracking and scratching of the die, to ensure proper functioning of the corresponding circuit device. In addition, in the “bare” testing, pieces of silicon broke off of the dies and were thrown about the interior of the chassis, which clearly presents a threat to operating conditions of any electronics or electro-mechanical device.
In addition, the exposed die is likely to produce EMI radiation which adversely compromises the circuit and/or neighboring equipment. Currently, there are no means for suppressing EMI emissions at the die level. Further, there is no implementation for directly attaching a heat sink to an exposed die, or “die referencing” the heat sink, in such a manner that suppresses EMI emissions at die level.
SUMMARY
According to the invention, a conductive gasket having a central opening is placed on a substrate surface to fit over an exposed die. The gasket is then compressed by a heat sink until the bottom surface of the heat sink contacts with the exposed die.
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Aoki Russell S.
Chiu Chia-Pin
Cooks Correy D.
Eckblad Michael Z.
Zhao Richard
Antonelli Terry Stout & Kraus LLP
Knight Anthony
Patel Vishal
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