Electrically writable nonvolatile memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185200

Reexamination Certificate

active

07460409

ABSTRACT:
A nonvolatile memory includes a memory cell array in which a plurality of memory cells are connected to a plurality of wordlines and a plurality of bitlines respectively intersecting at a right angle with the plurality of wordlines; a selector for selecting one of the bitlines which is connected to first one of the memory cells in which actual data is stored; and a transfer circuit for connecting with a reference bitline which is connected to second one of the memory cells in which a reference level is stored. The nonvolatile memory further includes an amplifier section, connected to the selector and the transfer circuit, for reading out and amplifying levels of the bitline and the reference bitline and comparing the actual data with the reference level; and a charger for charging the bitline selected by the selector.

REFERENCES:
patent: 5132933 (1992-07-01), Schreck et al.
patent: 5754475 (1998-05-01), Bill et al.
patent: 6191979 (2001-02-01), Uekubo
patent: 6424572 (2002-07-01), Sano
patent: 6480419 (2002-11-01), Lee
patent: 2005/0024966 (2005-02-01), Oyama

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