Electrically stabilized thin-film high-temperature...

Active solid-state devices (e.g. – transistors – solid-state diode – Superconductive contact or lead

Reexamination Certificate

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C438S754000, C438S002000, C505S220000, C505S330000, C257S662000

Reexamination Certificate

active

06552415

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of the technical application of high-temperature superconductors (HTS). It relates to an electrically stabilized thin-film high-temperature superconductor comprising a superconductive layer which is applied to a flat metallic substrate. Such a thin-film HTS is known, for example, from the article by K. Hasegawa et al., In-plane Aligned YBCO Thin Film Tape Fabricated by Pulsed Laser Deposition, International Symposium on Superconductivity (ISS 196), Sapporo, Oct. 21-24 (1996), p. 745-748.
It also relates to a method for producing such an HTS.
BACKGROUND OF THE INVENTION
To apply high-temperature superconductors (HTS) reliably at high electrical power such as, e.g. in a fault current limiter (FCL), it is essential to provide the superconductor with a reliable electrical bypass which prevents the formation of so-called hot spots which occur during the quenching of the superconductor due to production-related material inhomogeneities and can impair the function of the component. Such a bypass in the form of a layer of Au or Ag applied in the form of a flat layer applied to the HTS layer is described in the article by B. Gromoll et al., Resistive Current Limiter with YBCO Films, IEEE Transactions on Applied Superconductivity, Vol. 7, 1997, p. 828-831.
The bypass is intended to homogenize the voltage distribution by functioning as an alternative high-current path when the HTS quenches. This makes it possible to prevent the formation of hot spots. The minimum requirements for such a bypass are (1) good electrical contact to the HTS and (2) adequate thermal capacity for limiting the temperature rise.
In the printed document mentioned initially, a method has been described how a high-quality thin film of great length of Y-123 (YBCO) can be applied to a typical metallic substrate (e.g. of hastelloy) by means of pulsed laser deposition (PLD). However, a buffer layer of, e.g. yttrium-stabilized zirconium dioxide (YSZ) is provided between the substrate and the HTS in this case in order to prevent the oxidation of the substrate and the chemical reaction between the two layers. There is, therefore, no electrical contact between the HTS and the underlying substrate which, in principle, would be quite suitable as an electrical bypass.
SUMMARY OF THE INVENTION
It is, therefore, the object of the invention to create an electrically stabilized thin film high temperature superconductor in which the supporting substrate is used as an electrical bypass, and to specify a method for producing it.
In an HTS of the type initially mentioned, the object is achieved in that the superconductive layer is in electrical contact with the substrate in a manner so as to be distributed over the area of the substrate via a flat conductive layer applied to the surface of the superconductive layer opposing the substrate. Due to the contact between the HTS layer and the underlying metallic substrate being distributed over the area, many bypass paths for the current are created distributed over the area which can prevent the formation of hot spots at any point of the element at any time.
A first preferred embodiment is distinguished by the fact that contacting openings are arranged distributed over the area in the superconductive layer and in the underlying buffer layer, which openings expose the underlying substrate, that the conductive layer is conducted in a contacting manner to the exposed substrate in the area of the contacting openings, and that the contacting openings are generated by removing the superconductive layer or, respectively, the buffer layer. The number and distribution of the contacting openings can be optimized by means of conventional mask etching methods in such a manner that hot spots are reliably prevented by the substrate acting as bypass without unnecessarily reducing the cross section available for transporting the current.
A second preferred embodiment is characterized in that the contacting openings are generated by covering or shadowing during the application of the superconductive layer or, respectively, the buffer layer. In this case, additional masking and etching steps can be dispensed with during the generation of the contacting openings.
A first preferred embodiment of the method according to the invention is based on the fact that an electrically insulating buffer layer is applied to the full area of the metallic substrate in a first step, that the superconductive layer is applied to the full area of the electrically conductive buffer layer in a second step, that contacting openings are generated in the two applied layers at various points of the area in a third step, preferably by means of a mask etching method, through which contacting openings the substrate is freely accessible from above, and that a conductive layer which is in contact with the area of the superconductive layer and connects it to the exposed substrate through the contacting openings is applied to the full area in a fourth step.
A second embodiment of the method according to the invention is characterized in that an electrically insulating buffer layer is applied to the area of the substrate by means of a directed application from a first direction in a first step, the first direction being selected in such a manner that the bottoms of the grooves remain partially uncovered due to shadowing and form contacting openings, that the superconductive layer is applied to the electrically insulating buffer layer by means of a directed application from the first direction in a second step, and that a conductive layer, which contacts the area of the superconductive layer and connects it to the exposed substrate through the contacting openings on the bottoms of the grooves, is applied to the full area in a third step.


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K. Hasegawa, et al., “In-plane Aligned YBCO Thin Film Tape Fabricated by Pulsed Laser Deposition”, Oct. 1996, pp. 745-748.
B. Gromoll, et al., “Resistive Current Limiters With YBCO Films”, Jun. 1997, vol. 7, No. 2, pp. 828-831.
German Patent Office Search Report.
German Patent Office Classifiction.

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