Electrically programmable read only memory having reduced leakag

Details Electrically programmable read only memory having reduced leakag Electrically programmable read only memory having reduced leakag

1982-05-21

1984-07-03

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

365189, G11C 700, G11C 1140

Patent

active

044583486

ABSTRACT:
An electrically programmable read only memory includes a plurality of non-volatile memory elements having control gates which are commonly connected to a first word line and drains which are coupled to a write-down circuit for supplying a write-down voltage to said drains. To prevent the flow of leakage current caused by parasitic capacitance, at least one of source electrodes of the plurality of non-volatile memory elements is connected to ground potential through the drain-source path of a first switch MISFET whose gate electrode is connected to the first word line. When a word line driving signal of non-selection level is applied to the first word line, the first switch MISFET is non-conductive. Thus, leakage current is prohibited from flowing through the first switch MISFET. Further, in order to prevent deterioration of the rewrite-down efficiency of the memory, the write-down circuit includes a pn-junction element having a junction characteristic which is substantially equal to the drain junction characteristic of the non-volatile memory elements. The level of a write-down voltage to be applied to the drains of the non-volatile memory element is determined on the basis of the reverse breakdown voltage of the pn-junction element. Thus, the breakdown of the drain junction of the non-volatile memory elements during a write-down operation can be prevented, so that deterioration of the rewrite-down efficiency of the electrically programmable read only memory can be prevented.

REFERENCES:
patent: 4063224 (1977-12-01), Kirschner
patent: 4366555 (1982-12-01), Hu
patent: 4415993 (1983-11-01), Smith et al.
Grice et al., "Electrically Programmable Logic Array", IBM Tech. Disc. Bul., vol. 22, No. 10, 3/80, pp. 4621-4622.

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