Electrically programmable read-only-memory device

Static information storage and retrieval – Read only systems – Semiconductive

Patent

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Details

365174, 307238, G11C 1140

Patent

active

041539494

ABSTRACT:
A matrix of columns and rows of conductors with transistors located at the intersection thereof on a semiconductor chip is formed utilizing the washed emitter process which locates the ohmic contact windows close to the PN junction so that a small size piece of free metal, i.e., not connected to any other conductor, may be located within a shot distance, i.e., one micron or less, to the PN junction selected to be fused during the programming of a Read Only Memory. The small size of the free metal as near as possible to this PN junction minimizes heat losses, reduces power consumption and reduces programming errors normally incurred in the programming of Read Only Memories.

REFERENCES:
patent: 3797000 (1974-03-01), Agusta et al.

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