Electrically programmable non-volatile memory device and manufac

Details Electrically programmable non-volatile memory device and manufac Electrically programmable non-volatile memory device and manufac

1990-12-20

1992-03-31

Carroll, J.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 2324, 357 45, 357 54, 365185, H01L 2968, H01L 2710, H01L 2934

Patent

active

051012502

ABSTRACT:
A 1-transistor type flash EEPROM is disclosed. The memory cell in the EEPROM includes a control gate formed on a silicon substrate with an insulating layer disposed between them, and a floating gate formed to extend over the upper face and one side face of the control electrode with an insulating layers disposed between them. Drain and source regions are created in the silicon substrate on the opposite sides of the control gate. The area in the silicon substrate under the control gate between the drain and source regions defines a channel region. In the EEPROM, an application of high-level voltage to the control gate and the drain region produces hot electrons in the vicinity of the opposite ends of the drain region which are driven into the floating gate across the insulating layer, causing the floating gate to store data-representing charge. The flash EEPROM has uniform characteristics among memory cells and reduced cell area for improved miniaturization.

REFERENCES:
patent: 4513397 (1985-04-01), Ipri et al.
patent: 4907197 (1990-03-01), Uchida
G. Samachisa et al., "A 128K Flash EEPROM Using Double-Polysilicon Technology" IEEE, J. of Solid-State Circuits, vol. SC-22, No. 5 (Oct. 1987) pp. 676-683.
Y. Mitsutani and K. Makita, "A New EPROM Cell with a Side-Wall Floating Gate for High-Density and High-Performance Device", (Dec. 1985), pp. 635-638.
A. Wu et al., "A Novel High-Speed, 5-Volt Programming EPROM Structure with Source-Side Injection", IEDM 86 (Dec. 1986), pp. 584-587.

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