Electrically programmable memory device with improved dual float

Details Electrically programmable memory device with improved dual float Electrically programmable memory device with improved dual float

1995-04-24

1996-01-09

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular biasing

257315, 257316, 257314, 257390, G11C 1134, H01L 2968

Patent

active

054834872

ABSTRACT:
An improved method and structure for producing electrically programmable read only memory devices (EPROM's) and flash EPROM's having dual sidewall floating gates is provided. A conformal polysilicon layer is formed over a masking line with vertical sidewalls. The conformal layer is anisotrophically etched to form dual floating gates on the sidewalls of the masking line. The masking lines is removed. Source and drain regions are formed in-between and on either side of the dual gates. An insulating layer is formed over the dual gates and substrate surface. A control gate is formed over the dual gates. Word lines and other electrical contracts are formed to complete the EPROM or flash EPROM device.

REFERENCES:
patent: 5229631 (1993-07-01), Woo
patent: 5350937 (1994-09-01), Yamazaki et al.
patent: 5388953 (1994-08-01), Wake
patent: 5422504 (1995-06-01), Chang et al.

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